Summary of Contents for Infineon Cypress CY8CKIT-042
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The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio.
CE224891 – PSoC 4 Down Counter 7-bit Objective ® This example shows how to use the Count7 Component as a down counter on a PSoC 4 device. Requirements Tool: PSoC Creator ® Programming Language: C (Arm GCC 5.4.1) Associated Parts: PSoC 4 devices with UDBs Related Hardware:...
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PSoC 4 Down Counter 7-bit Design and Implementation The Count7 timer period can be varied. In this example, Count7 is configured with a period of 128, so the first count is 127 and Count7 resets when it reaches 0. A kit button and a control register are used to enable the counter, as Figure 2 shows.
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PSoC 4 Down Counter 7-bit Figure 3. switch_pin Parameter Settings For information on the hardware resources used by a Component, see the Component datasheet. Reusing this Example This example is designed for the CY8CKIT-042 pioneer kit. To port the design to a different PSoC 4 device and/or kit, change the target device using the Device Selector and update the pin assignments in the Design Wide Resources Pins settings as needed.
PSoC 4 Down Counter 7-bit Related Documents Application Notes AN79953 – ® Getting Started with PSoC Describes PSoC 4 and shows how to build the attached code example PSoC Creator Component Datasheets Down Counter 7-bit (Count7) The Count7 Component is a 7-bit down counter available as hardware signals. A multifunction hardware block that implements these communication components: I2C, SPI, UART, and EZI2C.
PSoC 4 Down Counter 7-bit Document History Document Title: CE224891 – PSoC 4 Down Counter 7-bit Document Number: 002-24891 Revision Orig. of Submission Description of Change Change Date 6302288 SYAO 09/14/2018 New code example www.cypress.com Document No. 002-24891 Rev.**...
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