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Low-power system design with AIROC™ Wi-Fi & Bluetooth® combo
chip and PSoC™ 6 MCU
Low power assistant (LPA)
Table 7
Guidelines for LPA configuration
Parameter
PSoC™ 6 MCU (Host)
System active power
mode
Core regulator
System idle power
mode
Deep sleep latency (ms)
Wi-Fi
Host wake
configuration
Host device interrupt
pin
Application note
Description
Selects the power mode the core operates in
when active – LP or ULP
Selects the type of regulator that powers the
core
Selects the power mode the core operates in
when idle – Active, Sleep, or Deep Sleep
Selects the minimum time for which the CPU
must be idle before entering Deep Sleep
Enables the capability of the WLAN device to
wake up the host from Deep Sleep
Selects the pin from the host to be
configured as the host wake signal from the
WLAN device
Recommended configuration
See
Deep sleep (for maximum power
saving)
Active (for minimum latency)
0 (enters Deep Sleep immediately
in idle)
because the Deep Sleep wakeup
latency is <50 us, it is OK to enter
Deep Sleep as soon as the device
hits idle.
Increase this parameter only if the
application involves tasks that
need to wake up/run every 2-3 ms
at times.
Enable (Check-box ticked)
First, configure the pin in PSoC™ 6
MCU that is connected to
WL_HOST_WAKE (see board
schematics). The pin
configuration includes setting the
drive mode to Digital Hi-Z and
interrupt trigger type to Falling
Edge. The interrupt trigger type
selects the polarity of the
WL_HOST_WAKE signal from
CYW43012. Falling selects "Active
LOW" and Rising selects "Active
HIGH" configuration.
For example, in CY8CKIT-062S2-
43012, P4[1] is connected to
WL_HOST_WAKE of the AIROC™
CYW43012 Wi-Fi & Bluetooth®
combo chip device. So, enable the
pin, set the drive mode to Digital
Hi-Z, interrupt trigger type to
Falling Edge, and select it from
the drop-down.
31
Table
6.
002-27910 Rev. *C
2023-05-29
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