Quick Start Procedure; Hardware Setup - Analog Devices Linear Technology DC2085 Demo Manual

QUICK START PROCEDURE

HARDWARE SETUP

SMAs
J2 & J3: Differential Trigger Input. Apply a signal to J2
from a 50Ω driver. Absorptive filters are required for
data sheet performance. Use J2 and J3 if the trigger is a
differential signal.
J4: Sample Clock Input. Apply a clock signal to this
SMA connector from a 50Ω driver. A 0dBm clock source
should be sufficient, but for best phase noise and jitter
performance, use the highest possible amplitude and slew
rate, up to 15dBm.
J5 & J6: Differential Output Signals. These SMAs provide
access to the differential outputs of the DAC. The output
impedance is designed to be 50Ω at each SMA, or 100Ω
differential. Connect an external balun or combiner to
these pins to drive a single-ended spectrum analyzer.
Linear Technology has various coupon boards for specific
frequencies and applications. More information is available
at www.linear.com.
J8: SYNC. This SMA is to provide access to the sync pin
of the LT8614. It is not used in normal use.
Turrets
+5V: Positive Input Voltage for the DAC and Digital Circuits.
This voltage feeds a series of regulators that supply the proper
voltages for the DAC. The voltage range for this turret is 4.8V
to 5.2V. Note: For close-in phase noise plots, driving this
voltage is not ideal. There is a known 20kHz noise hump in
the spectrum that is generated by the regulators. For the best
phase noise performance, back drive the onboard regulators
with the provided turrets from a low noise supply.
GND: Ground Connection. This demo board has only a
single ground plane. This turret should be tied to the GND
terminal of the power supply being used.
SVDD3V0: Optional 3.0V Input. This pin is connected
directly to the SVDD pin of the DAC. It requires a supply
that can deliver up to 100mA. Driving this pin will shut
down the onboard regulator.
AVDD3V3: Optional 3.3V Input. This pin is connected
directly to the AVDD3V3 pin of the DAC. It requires a
DEMO MANUAL DC2085
supply that can deliver up to 200mA. Driving this pin will
shut down the onboard regulator.
DVDD3V3: Optional 3.3V Input. This pin is connected
directly to the DVDD3V3 pin of the DAC. It requires a
supply that can deliver up to 50mA. Driving this pin will
shut down the onboard regulator.
AVDD1V8: Optional 1.8V Input. This pin is connected
directly to the AVDD1V8 pin of the DAC. It requires a
supply that can deliver up to 1A. Driving this pin will shut
down the onboard regulator.
DVDD3V3: Optional 1.8V Input. This pin is connected
directly to the DVDD1V8 pin of the DAC. It requires a
supply that can deliver up to 500mA. Driving this pin will
shut down the onboard regulator.
VP1: This is a test point that is at the output of the on-
board switching regulator. It is meant for test purposes.
It can also be driven to 2.5V to shut down the output of
the switching regulator.
TSTP & TSTN: These pins are tied directly to the TSTP
and TSTN pins of the DAC. They can be used to measure
the internal temperature and timing of the LVDS inputs.
FSADJ: This is an optional pin that is tied directly to the
FSADJ pin of the DAC. It can be used to set the full-scale
output current of the DAC. In normal operation this pin
is tied to GND through 500Ω to set a current of 40mA at
the output.
REFIO: This pin is tied directly to the REFIO pin of the
DAC and is used to set the reference voltage for the DAC.
Normally it is internally set to 1.25V but can be overdriven
with an external voltage from 1.1V to 1.4V.
Jumpers
The DC2085 demonstration circuit should have the fol-
lowing jumper settings as default positions.
JP1: PD. In the RUN position this pin results in normal
operation of the DAC. In the SHDN position the DAC is
powered down. (Default: RUN or up)
JP2: SPI and JTAG. This jumper selects how the FPGA is
programmed. In the SPI position the FPGA is programmed
from the onboard FTDI chip and the LTDACGen software. In
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