Advanced Chipset Setup - CHAINTECH 6VJD Manual

Chapter 3
3-3 Advanced Chipset Features
By choosing the Advanced Chipset Features option from the CMOS Setup Utility
menu (Figure 3-1), the screen below is displayed. This sample screen contains the
manufacturer's default values for the mainboard.
CMOS Setup Utility- Copyright (C) 1984-2001 Award Software
DRAM Clock/Drive Control
AGP & P2P Bridge Control
CPU & PCI Bus Controlo
Memory Hole
System BIOS Cacheable
Video RAM Cacheable
Flash BIOS Protection
:Move Enter:Select
F5:Previous Values
All of the above settings have been determined by the mainboard manufacturer
and should not be changed unless you are absolutely sure of what you are
doing. Explanation of the DRAM timing and chipset features setup is lengthy,
highly technical and beyond the scope of this manual. Below are abbreviated
descriptions of the functions in this setup menu. You can look on the world
wide web for helpful chipset and RAM configuration information including
AWARD's web site at http://www.award.com.
A. DRAM Clock/Drive Control
SDRAM Cycle Length
When synchronous DRAM is installed, the number of the clock cycles of CAS
latency depends on the DRAM timing. Do not reset this setting from the default
value specified by the system designer.
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Advanced Chipset Features
Press Enter
Press Enter
Press Enter
Disabled
Disabled
Disabled
Disabled
+/-/PU/PD:Value
F6:Fail-Safe Defaults
Figure 3-4 Chipset Features Setup Screen
Menu Level
F10:Save ESC:Exit
F7:Optimized Defaults
Item Help
F1:General Help