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Deployment CPU 315-4PN23
Setting VIPA specific CPU parameters > VIPA specific parameters
5.9.2.1.1
Synchronization between master system and CPU
Overview
PROFIBUS DP SyncInOut
PROFIBUS DP SyncOut
50
PROFIBUS DP syncInOut
Default: PROFIBUS DP async
Normally the cycles of CPU and DP master run independently. The cycle time of the CPU
is the time needed for one OB1 cycle and for reading respectively writing the inputs
respectively outputs. The cycle time of a DP master depends among others on the
number of connected slaves and the baud rate, thus every plugged DP master has its
own cycle time. Due to the asynchronism of CPU and DP master the whole system gets
relatively high response times. The synchronization behavior between every Yaskawa
PROFIBUS DP master and the CPU may be configured by means of a hardware configu-
ration as shown above. The different modes for the synchronization are in the following
described.
In PROFIBUS DP SyncInOut mode CPU and DP master system are waiting on each
other and form thereby a cycle. Here the whole cycle is the sum of the longest DP master
cycle and CPU cycle. By this synchronization mode you receive global consistent in-/
output data, since within the total cycle the same input and output data are handled suc-
cessively by CPU and DP master system. If necessary the time of the Watchdog of the
bus parameters should be increased at this mode.
In this operating mode the cycle time of the Yaskawa DP master system depends on the
CPU cycle time. After CPU start-up the DP master gets synchronized. As soon as their
cycle is passed they wait for the next synchronization impulse with output data of the
CPU. So the response time of your system can be improved because output data were
directly transmitted to the DP master system. If necessary the time of the Watchdog of
the bus parameters should be increased at this mode.
CPU and DP master system are waiting on
each other and form thereby a cycle.
HB140 | CPU | 315-4PN23 | en | 18-02
+
System 300S
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