Completing The Test; Four Step Residual Overcurrent Protection, (Zero Sequence Or Negative Sequence Directionality) Ef4Ptoc (51N/67N); Function Revision History - ABB Relion 670 Series Commissioning Manual

1MRK 505 372-UUS Rev. K
If there is any configuration logic, which is used to enable or block any of 4 available overcurrent
steps, make sure that step under test is enabled (that is, end fault protection).
2. Increase the injected current and note the operated value of the studied step of the function.
3. Decrease the current slowly and note the reset value.
4. Block higher set stages when testing lower set stages according to below.
5. Connect a trip output contact to a timer.
6. Set the injected current to 200% of the trip level of the tested stage, switch on the current and
check the time delay.
For inverse time curves, check the trip time at a current equal to 110% of the trip current for tmin.
7. Check that all trip and pickup contacts operate according to the configuration (signal matrixes)
8. Repeat the above described tests for the higher set stages.
9. Finally check that pickup and trip information is stored in the event menu.
10.4.2.3

Completing the test

Continue to test another function or end the test by changing the TESTMODE setting to Disabled.
Restore connections and settings to the original values, if changed for testing purposes.
10.4.3 Four step residual overcurrent protection, (Zero sequence or
negative sequence directionality) EF4PTOC (51N/67N)
Prepare the IED for verification of settings outlined in Section
Values of the logical signals for D2PTOC are available on the local HMI under Main menu/Test/
Function status /Current protection/ResidualOverCurr4Step(51N_67N,4(IN>)) /
EF4PTOC(51N_67N;4(IN>)):x, where x = instance number.
The Signal Monitoring in PCM600 shows the same signals that are available on the local HMI.
10.4.3.1

Function revision history

Document
revision
A
B
C
D
E
F
G
H
J
Busbar protection REB670
Commissioning manual
Product History
revision
2.2.1 -
2.2.1 -
2.2.2 Technical data table updated with note "Operate time and reset time are only valid if
harmonic blocking is turned off for a step".
2.2.3 -
2.2.3 -
2.2.4 -
2.2.4 -
2.2.4 The phase selection logic is added to allow phase segregated trip. The new phase
selections outputs added to this release are PHSELL1, PHSELL2 and PHSELL3. The setting
EnPhaseSel is added to enable or disable phase selection. The maximum value changed to
2000.0 % of IBase for IMin1, IMin2, IMin3 and IMin4 settings.
2.2.5 The harmonic restrain function changed to freeze the definite and IDMT timers.
© 2017 - 2022 Hitachi Energy. All rights reserved
Testing functionality by secondary injection
"Preparing the IED to verify
GUID-0F9199B0-3F86-45E0-AFC2-747052A20AE1 v2
Section 10
SEMOD128616-83 v2
SEMOD53296-3 v10
settings".
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