Xilinx Virtex-II Pro ML324 User Manual page 9

R
Figure
System ACE
Solution
UART
128 Mb
SDRAM
Active High
LEDs
PB SW 1
PB SW 2
GP SWs
* HEADERS
8 in FF1517
10 in FF1704
* MGT
LAUNCH SMA
4 X 4 in FF1517
4 X 5 in FF1704
Virtex-II Pro ML324 and ML325 Platform
UG063 (v1.2) May 30, 2006
1shows a block diagram of the board.
RIGHT ANGLE SMA
RECOVERED
MGT
* HEADERS
DIFF CLOCKS
SMA
2 X 2
OSC
SMA
Virtex-II Pro
OSC
SMA
SMA
2 X 2
DIFF CLOCKS
* HEADERS
RECOVERED
MGT
RIGHT ANGLE SMA
Figure 1: Virtex-II Pro ML32x Platform Block Diagram
www.xilinx.com
RIGHT ANGLE SMA
MGT
CLOCKS
DIFF
OSC
OSC
Socket
FPGA
OSC
Socket
DIFF
OSC
MGT
CLOCKS
RIGHT ANGLE SMA
Power Bus and Switches
Introduction
PROGRAM
DONE INIT
LED LED
RX TX
Active High
LEDs
PB SW 3
PB SW 4
GP SWs
UG063_01_042706
9