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Mnemonic Code
POST_STATUS_BOARD
POST_STATUS_
TESTTIMER
POST_STATUS_
TESTTIMER2
POST_STATUS_
TESTTIMER1
POST_STATUS_
TESTTIMER0
POST_STATUS_
MEMREFRESH
POST_STATUS_
TESTREFRESH
POST_STATUS_TEST15US
POST_STATUS_TEST64KB
POST_STATUS_TESTDATA
POST_STATUS_TESTADDR
POST_STATUS_
TESTPARITY
POST_STATUS_
TESTMEMRDWR
POST_STATUS_SYSINIT
POST_STATUS_
INITVECTORS
POST_STATUS_
8042TURBO
POST_STATUS_
POSTTURBO
POST_STATUS_
POSTVECTORS
POST_STATUS_
MONOMODE
POST_STATUS_
COLORMODE
POST_STATUS_
TOGGLEPARITY
POST_STATUS_
INITBEFOREVIDEO
Appendix B: Flash BIOS
Code
System Progress Report
13h
Initialize board, start
memory detection.
14h
Start timer tests.
15h
Test 8254 T2, for speaker,
port B.
16h
Test 8254 T1, for refresh.
17h
Test 8254 T0, for 18.2Hz.
18h
Start memory refresh.
19h
Test memory refresh.
1ah
Test 15usec refresh ON/OFF
time.
1bh
Test base 64KB memory.
1ch
Test data lines.
20h
Test address lines.
21h
Test parity (toggling).
22h
Test Base 64KB memory.
23h
Prepare system for IVT
initialization.
24h
Initialize vector table.
25h
Read 8042 for turbo switch
setting.
26h
Initialize turbo data.
27h
Modification of IVT.
28h
Video in monochrome mode
verified.
29h
Video in color mode
verified.
2ah
Toggle parity before video
ROM test.
2bh
Initialize before video ROM
check.
47
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