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impedance should be controlled to 85 Ω. Additionally, it is recommended to route the trace on the
inner layer of PCB, and do not cross it with other traces. For the same group of DSI or CSI signals,
all the MIPI traces should keep the same length. To avoid crosstalk, a distance of 1.5 times the
trace width among MIPI signal traces is recommended. During impedance matching, do not connect
GND on different planes to ensure impedance consistency.
⚫
It is recommended to select a low capacitance TVS for ESD protection and the recommended
parasitic capacitance should be below 1 pF.
⚫
Route MIPI traces according to the following rules:
a) The total trace length should not exceed 150 mm;
b) Control the differential impedance to 85 Ω ± 10 %;
c) Control intra-pair length difference within 0.7 mm;
d) Control inter-pair length difference within 1.4 mm.
Table 24: MIPI Trace Length Inside the Module
Pin Name
DSI_CLK_N
DSI_CLK_P
DSI_LN0_N
DSI_LN0_P
DSI_LN1_N
DSI_LN1_P
DSI_LN2_N
DSI_LN2_P
DSI_LN3_N
DSI_LN3_P
CSI0_CLK_N
CSI0_CLK_P
CSI0_LN0_N
CSI0_LN0_P
CSI0_LN1_N
SC690A_Series_Hardware_Design
Pin No
Length (mm)
103
50.71
102
50.37
105
50.28
104
50.58
107
50.32
106
50.00
109
50.20
108
50.49
111
50.43
110
50.16
78
20.54
77
20.26
80
20.75
79
20.74
82
20.79
Smart Module Series
Length Difference (P-N)
0.35
-0.30
0.32
-0.29
0.27
0.28
0.00
0.35
65 / 105
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