Section 4: Firmware Configuration; Serial Port S1 Configuration; Table 14: Firmware Generic Bus Memory Mapping; Table 15: Firmware Configuration Bits Mapping - Broadcom BCM91250A User Manual

BCM91250A
S e c ti o n 4 : F ir m wa r e C o n f ig ur a t i on
The firmware image in the flash is bi-endian, so it supports both big and little-endian operation.
describes the physical address and how much physical memory the firmware maps to the chip selects on the
generic bus.
Chip Select
CS0
CS1
CS3
CS4
CS6
Table 15 defines how the firmware (CFE) interprets the setting of switch SW1 at startup.
SW1 Setting
0x0
0x1
0x2*
0x3
0x6
0x7
0xA
* = recommended/default setting.
All other settings are reserved.
S P S1 C
ERIAL ORT
The firmware by default sets the BCM1250's E2_GENO signal (this is the mux select for the port) low. This
setting selects the asynchronous UART as the default.
Page 24 Firmware Configuration

Table 14: Firmware Generic Bus Memory Mapping

Description
Boot ROM
Alternate Boot ROM
LED Display
IDE
PCMCIA

Table 15: Firmware Configuration Bits Mapping

Action
UART console, no PCI initialization
PromICE console, no PCI initialization
UART console, PCI initialization
PromICE console, PCI initialization
UART console, PCI initialization, Hypertransport (HT) slave mode
UART console, no PCI initialization, CFE safe mode
VGA console, PCI initialization
ONFIGURATION
B roadc om C or por ati on
Physical Memory Address
0x1FC0_0000
0x1F80_0000
0x100A_0000
0x100B_0000
0x1100_0000
Document
User Manual
05/18/04
Table 14
Size
2 MB
2 MB
64 KB
64 KB
64 MB
91250A-UM100-R