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2. Interrupt Circuit Structure
The interrupt circuit consists of the interrupt input circuit, interrupt counter circuit, interrupt flip-flop,
interrupt enable flip-flop, interrupt detector circuit, and an interrupt control port located in an internal I/O
port used to control these circuits.
(1)
Iterrupt input circuit (INTR1 pin, INTR2 pin)
The interrupt signal inputs are Schmitt inputs. The inputs have noise rejection circuits that reject
input pulses of less than 80~120 µs as noise. The POL1/2 bit settings control the input logic. The
INTR1 and INTR2 pins can be used as Schmitt input ports. The pin data can be referenced from the
INTR1 and INTR2 bits (φK18) on the I/O map. In this case, noise rejection and input logic control do
not apply.
(2)
Counter circuit
Generation of an interrupt is determined by measuring the duration of the interrupt request. If an
interrupt request is generated, the interrupt flip-flop is set.
To set the counter circuit, set the measuring time in the interrupt 1 counter setting bits
"INT10~INT15", and set the INTC1 bit to "1". Similarly, for interrupt 2, set the counter setting bits
"INT20~INT25", and set the INTC2 bit.
(3)
Interrupt flip-flops (IEF1, IEF2)
The interrupt flip-flops are set by the output of the counter circuit. When the flip-flop is set to "1",
the interrupt enters standby state, and, if the interrupt is enabled, the interrupt is generated.
An INTR1 interrupt request sets the interrupt 1 flip-flop (IFF1) to "1".
An INTR2 interrupt request sets the interrupt 2 flip-flop (IFF2) to "1".
The interrupt flip-flop is reset when the CPU accepts the interrupt. To forcibly reset the flip-flop,
set the INTC bit to "0".
45
TC9314F
2003-07-03
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