Toshiba TC9314F Manual page 12

11. Explanation List of Function and Operation of Instructions (explanation of symbols)
M: Data memory address
Normally, one of 000H~03FH address of data memory.
M*: Data memory address (256 word)
One of 000H~0FFH address of data memory (available at executing ST and LD instruction)
r: General register
One of 00H~0FH address of data memory.
PC: Program counter (13 bit)
STACK: Stack register (13 bit)
G: G-register (5 bit)
DATA: Data register (16 bit)
I: Immediate data (4 bit)
I*: Immediate data (5 bit)
N: Bit position (4 bit)
: All "0"
C: Code No. of port (4 bit)
C : Lower rank 3 bit of port code No. (4 bit)
N
R : General register No. (4 bit)
N
ADDR : Program memory address in page 0 or 1 (13 bit)
1
ADDR : Higher rank 6 bit of program memory address in page 0
2
Ca: Carry
b: Borrow
IN1~IN3: Port treated during the execution IN1~IN3 instruction
OUT1~OUT3: Port treated during the execution OUT1~OUT3 instruction
( ): Register or data memory content
[ ] : Content of port indicated by code No. C (4 bit)
C
[ ]: Content of data memory indicated by the content of register or data memory
[ ] : Content of program memory (16 bit)
P
IC: Instruction code (6 bit)
*: Instruction having skip function
D : Data memory column address (4 bit)
C
D : Data memory row address (2 bit)
R
D *: Data memory row address (4 bit) (available at executing ST and LD instruction)
R
(M) b0~(M) b3: Bit data for content of data memory
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TC9314F
2003-07-03