Quectel EC200U Series Hardware Design page 48

MAIN_TXD 67
MAIN_RXD 68
Table 16: Pin Definition of Debug UART Interface
Pin Name Pin No.
DBG_TXD 12
DBG_RXD 11
Table 17: Pin Definition of Auxiliary UART Interface
Pin Name Pin No.
AUX_TXD 138
AUX_RXD 137
The module provides 1.8 V UART interface. Use a level shifter if the application is equipped with a 3.3 V
UART interface. A level shifter TXS0108EPWR provided by Texas Instruments is recommended. The
following figure shows a reference design.
VDD_EXT
MAIN_RI
MAIN_DCD
MAIN_CTS
MAIN_RTS
MAIN_DTR
MAIN_TXD
MAIN_RXD
Please visit http://www.ti.com for more information.
Another example with transistor circuit is shown as below. For the design of circuits shown in dotted lines,
see that shown in solid lines, but pay attention to the direction of connection.
EC200U_Series_Hardware_Design
DO Main UART transmit
DI Main UART receive
I/O Description
DO Debug UART transmit
DI Debug UART receive
I/O Description
DO Auxiliary UART transmit
DI Auxiliary UART receive
VCCA
0.1 μF
120K
OE
A1
A2
A3
A4
A5
A6
A7
51K
A8
Figure 20: Reference Circuit with Translator Chip
VCCB
0.1 μF
GND
B1
B2
Translator
B3
B4
B5
B6
B7
B8
LTE Standard Module Series
Comment
1.8 V power domain. If unused,
keep them open.
Comment
1.8 V power domain. If unused,
keep them open.
VDD_MCU
RI_MCU
DCD_MCU
CTS_MCU
RTS_MCU
DTR_MCU
RXD_MCU
TXD_MCU
51K
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