CPLA [m]
Complement data memory place result in the accumulator
Description
Each bit of the specified data memory is logically complemented (1¢s comple-
ment). Bits which previously contained a one are changed to zero and
vice-versa. The complemented result is stored in the accumulator and the
contents of the data memory remain unchanged.
Operation
ACC ¬ [m]
Affected flag(s)
TC2
¾
DAA [m]
Decimal-Adjust accumulator for addition
Description
The value of the accumulator is adjusted to a BCD (Binary Code Decimal)
code. If bits 0~3 of the accumulator are greater than 9 or AC is one, six is
added to the low-order nibble of the accumulator, deriving a BCD digit in the
low-order nibble. Similarly, if bits 4~7 of the accumulator are greater than
nine or C is one, six is added to the high-order nibble of the accumulator, gen-
erating a BCD digit in the high-order nibble. The result is stored in the data
memory.
Operation
If ACC.3~ACC.0 >9 or AC=1
then ([m].3~[m].0) ¬ (ACC.3~ACC.0)+6
else ([m].3~[m].0) ¬ (ACC.3~ACC.0)
and
If ACC.7~ACC.4 >9 or C=1
then ([m].7~[m].4) ¬ (ACC.7~ACC.4)+6,C=1
else ([m].7~[m].4) ¬ (ACC.7~ACC.4),C=C
Affected flag(s)
TC2
¾
DEC [m]
Decrement data memory
Description
Data in the specified data memory are decremented by one.
Operation
[m] ¬ [m]-1
Affected flag(s)
TC2
¾
TC1
TO
PD
OV
¾
¾
¾
¾
TC1
TO
PD
OV
¾
¾
¾
¾
TC1
TO
PD
OV
¾
¾
¾
¾
35
HT827A0
Z
AC
C
Ö
¾
¾
Z
AC
C
¾
¾
Ö
Z
AC
C
Ö
¾
¾
March 15, 2000
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