CALL addr
Subroutine call
Description
The instruction unconditionally calls a subroutine which is located at the in-
dicated address. The program counter increments once to obtain the address
of the next instruction, and pushes this onto the stack. The indicated address
is then loaded. Program execution continues with the instruction at this ad-
dress.
Operation
Stack ¬ PC+1
PC ¬ addr
Affected flag(s)
TC2
¾
CLR [m]
Clear data memory
Description
The contents of the specified data memory are cleared to zero.
Operation
[m] ¬ 00H
Affected flag(s)
TC2
¾
CLR [m].i
Clear bit of data memory
Description
Bit i of the specified data memory is cleared to zero.
Operation
[m].i ¬ 0
Affected flag(s)
TC2
¾
CLR WDT
Clear watchdog timer
Description
The WDT and WDT Prescaler are cleared (re-count from zero). The power
down bit (PD) and time-out bit (TO) are both cleared.
Operation
WDT & WDT Prescaler ¬ 00H
PD & TO ¬ 0
Affected flag(s)
TC2
¾
TC1
TO
PD
OV
¾
¾
¾
¾
TC1
TO
PD
OV
¾
¾
¾
¾
TC1
TO
PD
OV
¾
¾
¾
¾
TC1
TO
PD
OV
0
0
¾
¾
33
HT827A0
Z
AC
C
¾
¾
¾
Z
AC
C
¾
¾
¾
Z
AC
C
¾
¾
¾
Z
AC
C
¾
¾
¾
March 15, 2000
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