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85DRV5 / 85DRV5-L
Configure SDRAM
Timing by SPD
SDRAM Frequency Allows you to set the SDRAM frequency.
SDRAM CAS# Latency With SDRAM Timing by SPD disabled, you can se-
SDRAM Bank Inter-
leave
SDRAM Burst Length With SDRAM Timing by SPD disabled, you can se-
SDRAM Command
Memory Hole Allows you to enabled / disabled (default) the sup-
Auto precharge for
TLB/WB
Write Recovery Time If Auto Precharge for TLB/WB is enabled, this op-
CPU Read DRAM Fast
Ready
SPD (Serial presence detect) is a device in memory
module for storing the module information such as
DRAM timing and chip parameters. If this option is
enabled, BIOS will access SPD automatically to
configure module timing. If disabled, DRAM timing
can be configured manually.
Choices: Auto; 200MHz; 266MHz
lect the SDRAM CAS# (Column Address Strode)
signal latency time manually. A shorter time means
a shorter wait time after the CAS signal.
Choices: 2Clocks; 2.5 Clocks
This item allows you to enable / disable SDRAM
Bank Interleave function (between different memory
modules).
Choices: Disabled (default); Enabled
lect the SDRAM Burst length manually.
Choices: 8; 4
Allows you to set the SDRAM Command Rate.
Rate
Choices: 1T; 2T
port of Memory Hole which is reserved for ISA card.
If enabled, Auto precharge (refresh charge) is en-
abled for the TLB (Translation Lookaside Buffer) or
Write Back for the system memory access.
Choices: Disabled (default); Enabled
tion is for setting the Write Recovery Time.
Choices: 1T; 2T
This item allows you to enable/disable the CPU Read
DRAM Fast function.
Choices: Disabled (default); Enabled
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