Advantech ROM-DB7502 User Manual page 35

A13 PCIE_REFCK+
A14 PCIE_REFCK-
A15 GND
A16 PCIE_A_X_RX+
A17 PCIE_A_X_RX-
A18 GND
A19 NC
A20 GND
A21 PCIE_B_X_RX+
A22 PCIE_B_X_RX-
A23 GND
A24 GND
A25 PCIE_C_X_RX+
A26 PCIE_C_X_RX-
A27 GND
A28 GND
A29 PCIE_D_X_RX+
A30 PCIE_D_X_RX-
A31 GND
A32 NC
PCI Express Reference Clock for Lanes 0 to 3
PCI Express Reference Clock for Lanes 0 to 3
PCI Express channel 0, Receive Input differential pair
PCI Express channel 0, Receive Input differential pair
GND
GND
PCI Express channel 1, Receive Input differential pair
PCI Express channel 1, Receive Input differential pair
GND
GND
PCI Express channel 2, Receive Input differential pair
PCI Express channel 2, Receive Input differential pair
GND
GND
PCI Express channel 3, Receive Input differential pair
PCI Express channel 3, Receive Input differential pair
GND
27 ROM-DB7502 User Manual