Advantech ROM-DB7502 User Manual page 34

2.4.2.6 PCIE slot (CN16)
The ROM-DB7502 Evaluation Board has a standard 4 Lane PCI Express interface.
Pin Pin Name
B1 +V12
B2 +V12
B3 +V12
B4 GND
B5 NC
B6 NC
B7 GND
B8 +V3
B9 PCIEX_A_JTAG1
B10 +V3A
B11 PCIE_A_WAKE#
B12 NC
B13 GND
B14 PCIE_A_X_TX+
B15 PCIE_A_X_TX-
B16 GND
B17 NC
B18 GND
B19 PCIE_B_X_TX+
B20 PCIE_B_X_TX-
B21 GND
B22 GND
B23 PCIE_C_X_TX+
B24 PCIE_C_X_TX-
B25 GND
B26 GND
B27 PCIE_D_X_TX+
B28 PCIE_D_X_TX-
B29 GND
B30 NC
B31 NC
B32 GND
A1 PCIE_A_X_PRSNT# NC
A2 +V12
A3 +V12
A4 GND
A5 PCIEX_A_JTAG2
A6 PCIEX_A_JTAG3
A7 NC
A8 PCIEX_A_JTAG5
A9 +V3
A10 +V3
A11 PCIE_A_RST#
A12 GND
ROM-DB7502 User Manual
DESCRIPTION
Power
Power
Power
GND
GND
Power
NC
Power
Sideband wake signal asserted by components requesting
wakeup.
GND
PCI Express channel 0, Transmit Output differential pair
PCI Express channel 0, Transmit Output differential pair
GND
GND
PCI Express channel 1, Transmit Output differential pair
PCI Express channel 1, Transmit Output differential pair
GND
GND
PCI Express channel 2, Transmit Output differential pair
PCI Express channel 2, Transmit Output differential pair
GND
GND
PCI Express channel 3, Transmit Output differential pair
PCI Express channel 3, Transmit Output differential pair
GND
GND
Power
Power
GND
NC
NC
NC
Power
Power
Reset Signal for external devices.
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