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Phase/AMP Series DPA1/DCPA1
circuit for Power SCR Q1 will be as described above. The sharp rising initial spike of the gate signal provides
rapid turn on of the SCR, and the continuing lower level signal insures that the Power SCR's will stay on.
4-40.
POWER SCR CIRCUITS.
4-41.
The power SCR's are connected such that they are forward biased when their respective slave SCR's,
Q4 and Q5 in the Pulse Shaper circuits, are forward biased. The gate signals from the Pulse Shaper circuits
are applied between the gate and cathode terminals of the power SCR's. The gate signal holds the SCR on
until a line Voltage zero occurs. Besides the power SCR's Q1 and Q2, the power SCR circuit consists of fuse
F1, capacitors C14, C103, and C104, resistor R24, and a transient Voltage protection device. Fuse F1 is a
subcycle type matched to the power SCR's to prevent surge current damage. Capacitors C104 and C104, and
the RC network formed by resistor R24 and capacitor C14 work together to reduce the possibility of dv/dt firing
of the power SCR's.
4-42.
VOLTAGE FEEDBACK CIRCUIT.
4-43.
The Voltage Feedback circuit consists of power transformer T2, rectifiers D10 and D11, zener diode
DZ5, and resistors R4, R16, and R17. The function of the circuit is to maintain the power delivered to the load
by the unit to a set level. The primary winding delivered of power transformer T2 is connected across L2 and
X1 terminals of the unit. The Voltage across the secondary winding of power transformer T2 is full wave
rectified by rectifiers D10 and D11. The output of the full wave rectifier is fed to the square law detector formed
by zener diode DZ5, and resistors R16 and R17. The function of the square law detector is to produce a signal
that exhibits the property that Voltage squared is proportional to power. The output signal of the square law
detector is applied to the summing point feeding the Summing Amplifier circuit through resistor R4. The output
Voltage of the unit is sensed by the primary winding of power transformer T2 and is coupled to the secondary
winding. As the output Voltage of the unit increases (power increases), the output of the square law detector
increases.
When the power delivered from the unit decreases, the output of the square law detector
decreases. When the feedback signal at the summing point just equals the control signal input, the power
output of the unit will be maintained at the level set.
4-44.
OPTIONAL CURRENT LIMIT.
4-45.
There are two Current Limits, option A and option F. Since the option A Current Limit is very common
and is installed on many units at the factor, the theory of operation of this current limit is discussed in this
handbook. The theory of operation of the option F Current Limit is discussed in another handbook. The
Current Limit consists of a Current Limit Module and a Current Transformer. The Current Limit Module
contains a power transformer T2, rectifiers D114 through D118, resistors R131 through R133, and ammeter.
The Voltage developed across the Current Indicator is applied to the primary winding of power transformer T2.
The Voltage on the secondary winding of power transformer T2 is rectified by the full wave bridge rectifier
formed by rectifiers D114 through D117. The positive output of the full wave bridge rectifier is applied to one
end of the CURRENT LIMIT control, P101, through resistor R131. The negative output of the full wav bridge
rectifier is applied to the other end of the CURRENT LIMIT control through resistor R132. The wiper of the
CURRENT LIMIT control is connected to the summing point feeding the Summing Amplifier circuit through
resistor R133 and diode D118. Resistors R131 and R132 are selected to set the limits of the CURRENT LIMIT
control, and resistor R133 and diode D118 establish a threshold level.
approaches the maximum value set by the CURRENT LIMIT control, a Voltage proportional to the over-current
will be fed back to the summing point. The feedback signal is subtractive and will cause the Summing
Amplifier to reduce its DC output signal so that the output current from the unit will remain at the value set by
the CURRENT LIMIT control.
Document 9100030
AMETEK HDR Power Systems
Theory of Operation
When the current to the load
29
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