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■ BASIC EXTERNAL CONNECTION DIAGRAM
1.8–5.5 V
+
or
C
PW1
2.4–5.5 V
∗1
∗2
C
∗3
LCD1
C
LCD2
C
LCD3
C
LCD4
C
LCD6
C
LCD7
Open
(
∗4
C
G1
( )
C
D1
( )
∗5
C
G3
( )
C
D3
*1: For Flash programming
*2: When 1/4 bias is selected
*3: When 1/5 bias is selected
*4: When OSC1 crystal oscillator is selected
*5: When OSC3 crystal/ceramic oscillator is selected
( ): Do not mount components if unnecessary.
88SEG × 8COM/80SEG × 16COM
V
DD
C
PW2
V
D1
C
LCD1
V
C1
C
LCD2
V
C2
C
LCD3
V
C3
C
LCD4
V
C4
C
LCD5
V
C5
C
P1
C
LCD6
C
P2
C
LCD7
C
P3
C
LCD8
C
P4
C
P5
[The potential of the substrate
)
OSC1
OSC2
X'tal1
OSC3
OSC4
X'tal3/
Ceramic
#RESET
V
SS
Seiko Epson Corporation
LCD panel
S1C17M10
(back of the chip) is V
.]
SS
TOUT00/CAP00
TOUT01/CAP01
S1C17M10
External voltage
EXSVD0
R
DBG
V
(
)
DD
DCLK
DSIO
DST2
V
PP
C
VPP
Pxy
I/O
SDI0
SDO0
SPI
SPICLK0
#SPISS0
SCL0
I
2
C
SDA0
USIN0
UART
USOUT0
PWM/Capture
ICDmini
9
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