Table 3-6. SDHC2_BASE signal configuration
Signal name
SDHC2_CLK
3.4.5 GPIO1 and FTM signal multiplexing
The GPIO1 interface shares signals with FTM. The functionality of these signals is
determined by the RCW[GPIO_FTM_EXTCLK_BASE].
Signal name
1
TBSCAN_EN_B
1. If TJTAG_EN=1, this pin is used as TBSCAN_EN_B. If JTAG_EN_B=0, the pins are used as defined in the bit settings.
2
3.4.6 I
C1, GPIO1, and FTM signal multiplexing
2
The I
C1 interface shares signals with GPIO1 and FTM. The functionality of these
signals is determined by the RCW[IIC1_BASE].
Signal name
IIC1_SCL
NXP Semiconductors
(continued)
Signal function
SAI1_RX_SYNC
SPI_CS0_B
GPIO1[29]
FTM2_CH3
SDHC2_CLK
SAI1_TX_DATA
SPI_CLK
2
Table 3-7. I
C1 signal configuration
Signal function
GPIO1[30]
Reserved
FTM_EXTCLK
Reserved
2
Table 3-8. I
C1 signal configuration
Signal function
GPIO1[2]
IIC1_SCL
FTM1_CH0
Table continues on the next page...
QorIQ LS1012A Reference Manual, Rev. 1, 01/2018
RCW[SDHC2_EXT_
RCW[SDHC2_BASE_DAT321] /
*]
10
11
RCW[SDHC2_EXT_
RCW[SDHC2_BASE_BASE]
CLK]
0
00
1
01
10
11
Chapter 3 Signal Descriptions
RCW[SDHC2_BASE_BASE]
RCW[GPIO_FTM_EXTCLK_BAS
E]
00
01
10
11
RCW[IIC1_BASE]
00
01
10
215
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