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RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note
1.4
Deriving the Bus Voltage to Driver Output Voltage Ratio
To determine the bus voltage, focus on the data link between the two drivers and ignore the 4-to-2 wire conversion
network. This is done by ensuring that R
effects on the bus.
Figure 7
shows the data link with the driver output voltages V OD1 and V OD2 generating the bus voltage, V Bus .
Because of design symmetry, both driver output voltages are equally attenuated by the voltage diver action of 2R
and R
to generate V
T
Bus
V
=
V
(EQ. 4)
Bus
OD1
To determine k, convert the circuit in
node is terminated to match Z 0 , the input impedance (Z 0 ) of one bus node is parallel to the termination resistor,
R T , of the other bus node. Therefore, each driver output sees a load resistance of R L = 2R S + R T ||Z 0 .
From
Figure
8, you can derive the gain of each bus node with:
V
Bus1
k
---------------- -
=
=
V
OD1
Then, multiplying out and collecting terms gives
(EQ. 5)
------------------------------------------------------------- -
k
=
1
+
2R
S
R15AN0009EU0100 Rev.1.00
Mar 4, 2022
and R
B
. Denoting the voltage divider gain as k, express the bus voltage using
k
+
V
k
OD2
R
S
V
R
D1
OD1
R
S
Figure 7. Design Symmetry Ensures Equal Attenuation
Figure 7
R
S
V
R
Z
D1
OD1
T
R
S
Figure 8. Each Driver has a V
V
R
Z
Bus2
T
0
---------------- -
------------------------------------- -
=
V
2R
+
R
Z
OD2
S
T
0
1
1 Z
+
1 R
0
T
are high-impedance enough to not cause any significant loading
D
V
Z
Z
R
Bus
T
0
0
into the load circuits of both drivers
+
V
V
Z
Bus1
Bus2
0
(V
= 0)
(V
= 0)
OD2
OD1
Contribution of VOD·k
BUS
Equation
5:
R
S
V
OD2
D2
T
R
S
(Figure
8). Because each bus
R
S
R
V
D2
0
T
OD2
R
S
S
Equation
4:
Page 4
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