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RS-485: Transmitting Full-Duplex Data over Single Twisted-Pair Cable Application Note
1.
Bus Node Circuit Design
There are three main aspects to be considered during the bus node design
▪ Current limiting: As the full-duplex operation requires both transceivers to transmit and receive data at the
same time, there are plenty of occasions where the signal polarities of both driver outputs are opposite to one
another. This can cause large differential currents to flow, which overloads the drivers and eventually leads to
thermal shutdown, a transceiver internal protection scheme required by EIA-485. Therefore, to prevent a driver
from overloading, two series resistors, R
▪ Bus node termination: To minimize or even eliminate signal reflections on the bus line, the bus node
impedance must match the characteristic impedance of the bus cable. This is accomplished with the
termination resistor, R
▪ 4-to-2 Wire conversion: Resistive voltage dividers, consisting of the bus resistors, R B , and the driver output
resistors, R D , are used to pass the local transmit data onto the bus and to extract the receive data that is sent
by the remote transmitter from the bus.
1.1
Current Limiting
To match the bus node impedance with the characteristic cable impedance, Z 0 , the value of R S should be close to
half the value of Z 0 :
2
R
Z
(EQ. 1)
S
0
While it is possible to choose higher R S values to reduce the output current, they also reduce the bus voltage,
because of the voltage divider action with the termination resistor, R T .
1.2
Bus Termination
The purpose of the termination resistor, R
matches the characteristic cable impedance: Z
parallel impedance of the termination resistor and the sum of the current limiting resistors and the driver output
impedance.
Z
=
R
2R
(EQ. 2)
IN
T
Before finding the value of R
specified as a parametric value but can be derived from the V-I characteristic of the driver found in the datasheet.
R15AN0009EU0100 Rev.1.00
Mar 4, 2022
, are placed into the driver output path that limit the current flow.
S
.
T
V
4-to-2 Wire
S
Conversion
V
CC
A
R
R
B
R
R
D
Z
D
Y
D
GND
Current
Limiting
Figure 3. Three Main Aspects of the Bus Node Circuit Design
, is to adjust the input impedance of the bus node circuit such, that it
T
+
R
=
Z
S
O
0
, it is necessary to establish the driver output impedance, R
T
R
B
R
B
R
D
T
R
S
R
S
Bus
Termination
= Z
. As shown in
Figure
IN
0
(Figure
3):
P
Z
= Z
IN
0
N
4, the bus node input impedance is the
. R
O
O
is usually not
Page 2
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