GPIO electrical characteristics and definitions
FT_PAD
It is recommended to clamp the input voltage with an external clamp (for instance a series of
resistors and the Schottky diode to VREF+).
The parasitic diodes are not characterized for reliability. STMicroelectronics does not
guarantee the level of current which those diodes can accept.
Work around proposal
If there is an unused FT pad available on the STM32 device, connect it to the ADC input pad
with parallel configuration as illustrated in
DC source
0~5 V
1.
The ADC makes the conversion with the other FT_PAD pull-down enabled.
2.
If first ADC conversion result is less than 2 V (which indicates that the DC source is
inside the ADC input range), the ADC re-does the conversion with pull-down disabled.
The above method avoids the parasitic diode forward bias.
22/31
Figure 13. Example of five-volt ADC conversion
SW_IO
Figure 14. Workaround example for five-volt ADC conversion
27 kOhm
AN4899 Rev 3
V
V
DDA
SW_ADC
Figure
14.
STM32
SW_IO
Pull-down
40 kOhm (typ.)
AN4899
REF+
ADC
MSv46884V1
To ADC
FT_PAD
MSv46885V1
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