Command Register; Cylinder High Register; Cylinder Low Register; Table 40 Alternate Status Register - Hitachi CinemaStar P7K500 Specifications

Registers
7.0
In Serial ATA, the host adapter contains a set of registers that shadow the contents of the traditional device
registers, referred to as the Shadow Register Block. Shadow Register Block registers are interface registers
used for delivering commands to the device or posting status from the device. About details, please refer to
the Serial ATA Specification.
In the following cases, the host adapter sets the BSY bit in its shadow Status Register and transmits a FIS to
the device containing the new contents.
Command register is written in the Shadow Register Block
Device Control register is written in the Shadow Register Block with a change of state of the SRST bit
COMRESET is requested
7.1 Alternate Status Register
7 6
BSY RDY

Table 40 Alternate Status Register

This register contains the same information as the Status Register. The only difference is that reading this
register does not imply interrupt acknowledge or clear a pending interrupt. See 7.13 "Status Register" on the
page 62 for the definition of the bits in this register.

7.2 Command register

This register contains the command code being sent to the device. Command execution begins immediately
after this register is written. The command set is shown in 10.0 Command Descriptions on page 115.
All other registers required for the command must be set up before writing the Command Register.

7.3 Cylinder High Register

This register contains the high order bits of the starting cylinder address for any disk access. At the end of
the command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 16-23. At the end of the command, this register is updated to reflect
the current LBA Bits 16-23.
The cylinder number may be from zero to the number of cylinders minus one.
When 48-bit addressing commands are used, the "most recently written" content contains LBA Bits 16-23,
and the "previous content" contains Bits 40-47. The 48-bit Address feature set is described in 8.15.

7.4 Cylinder Low Register

This register contains the low order bits of the starting cylinder address for any disk access. At the end of the
command, this register is updated to reflect the current cylinder number.
In LBA Mode this register contains Bits 8-15. At the end of the command, this register is updated to reflect
the current LBA Bits 8-15.
HITACHI Deskstar & CinemaStar P7K500 Hard Disk Drive specification (Rev 1.1)
Alternate Status Register
5 4 3
DSC
DF DRQ
/SERV
59
2 1 0
COR IDX ERR