11 Registers
Addresses
CS0-
CS1-
DA2
DA1
N
N
X
N
A
0
N
A
1
N
A
1
N
A
1
A
N
0
A
N
0
A
N
0
A
N
0
A
N
0
A
N
1
A
N
1
A
N
1
A
N
1
A
N
1
A
N
1
A
N
1
A
A
X
*1 "imped" stands for "impedance"
*2 "Mapping of registers in LBA mode
Logic conventions : A = signal asserted
N = signal negated
X = does not matter which it is
Figure 16 Register Set
Communication to or from the device is through an I/O Register that routes the input or output data to or from
registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW-).
The Command Block Registers are used for sending commands to the device or posting status from the device.
The Control Block Registers are used for device control and to post alternate status.
Cylinder High/Low and Sector Number Register
11.1
Alternate Status Register
7
6
BSY
RDY
Figure 17 Alternate Status Register
This register contains the same information as the Status Register. The only difference is that reading this register
does not imply interrupt acknowledge or clear a pending interrupt. See "11.13 Status Register" on page61 for the
definition of the bits in this register.
11.2
Command register
This register contains the command code being sent to the device. Command execution begins immediately after
this register is written. The command set is shown in "Figure 38 Command set" on page 90.
All other registers required for the command must be set up before writing the Command Register.
Travelstar 5K160 (PATA) Hard Disk Drive Specification
DA0
READ (DIOR-)
X
X
Data bus high imped*1
X
X
Data bus high imped
0
X
Data bus high imped
1
0
Alternate Status
1
1
Device Address
0
0
Data
0
1
Error
1
0
Sector Count
1
1
LBA Low
1
1
0
0
LBA Mid
0
0
0
1
LBA High
0
1
LBA bits 16-23
1
0
Device
1
0
LBA bits 24-27
1
1
Status
X
X
Invalid address
Alternate Status Register
5
4
DF
DSC
Functions
Not used
Control block registers
Not used
Not used
Device Control
Not used
Command block registers
Data
Features
Sector Count
LBA Low
LBA bits 0-7
LBA bits 0-7
LBA Mid
LBA bits 8-15
LBA High
Device
Command
3
2
DRQ
COR
58 / 188
WRITE (DIOW-)
LBA bits 8-15
LBA bits 16-23
LBA bits 24-27
Invalid address
1
0
IDX
ERR