Chapter 2. Architecture And Technical Overview - IBM System p5 550 Technical Overview And Introduction

Architecture and technical
Chapter 2.
overview
This chapter discusses the overall system architecture of the p5-550 or p5-550Q. Figure 2-1
details the DCM option. The differences of the QCM option are described in 2.2.1, "p5-550Q
POWER5+ quad-core module" on page 27. The bandwidths in this chapter are theoretical
maximums that are provided for reference. It is always recommended that you obtain
real-world performance measurements using production workloads.
Two SPCN ports
P1-T3 T4
2x8 B
@528 MHz
Figure 2-1 The IBM System p5 550 architecture with 2.1 GHz DCM
© Copyright IBM Corp. 2006. All rights reserved.
System Ports HMC ports Rack Indicator Light
P1-T1 T2 P1-T5 T6 cable port P1-T13
Service Processor
GX+ connection @ 700 MHz
1056 MHz 1056 MHz
2x8 B for read 2x8 B for read
2x8 B for write 2x8 B for write
SMI-II SMI-II SMI-II
RIO-2 bus 2B (Diff'l) USB ports
Each direction @ 1GB/s P1-T7 T8
CoD key card
buzz interface
2x4 B @
633 MHz
GX+
700
Enhanced
MHz
I/O Controller
133 MHz 64-bit
RAID enablement
SMI-II
2x8 B
@528 MHz
4 pack disk drive backplane
2
Ethernet ports
P1-T9 T10
P1-C1 C2 C3 C4 C5
Dual 1GB
USB
Ethernet
32-bit
64-bit
33 133
MHz MHz
Long Long Long Short Short
PCI-X to PCI-X
bridge 0
PCI-X to PCI-X
bridge 3
IDE
controller
Dual SCSI
Operator panel
66 MHz
Ultra320 64-bit
32-bit
card
Slim-line media device
Slim-line media device
Optional media backplane
Tape drive
P4-D1
4 pack disk drive backplane
25