Pacific Power Source AFX Series Operation Manual page 217

Command Syntax
Description
Parameters
Example
Query Format
Description
Returned Data Format
Query Example
Command Syntax
Description
Parameters
Parameter Format
Example
Query Format
Returned Data Format
Query Example
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AFX Series Power Source Operation Manual
*OPC
The Operation Complete (OPC) command sets bit 0 in the Standard
Event Status Register when all pending operations have finished.
Optional: < BLOCK | 0 | NOBLOCK | 1>
*OPC
*OPC? < BLOCK | 0 | NOBLOCK | 1>
IEEE488.2 standard command. The parameter is optional.
The argument is optional, if it is not sent:
• In UPC compatible mode default argument will be NONBLOCK or 1.
• In normal mode default argument will be BLOCK or 0.
*OPC? BLOCK | 0
Returns 1 when all pending overlapped operations have been
completed. It can be used to cause the controller to wait for commands
to complete.
*OPC? NOBLOCK | 1
Returns 1 if all pending overlapped operations have been completed or
0 if there are pending overlapped operations. It will not cause the
controller to wait for commands to complete. Pending overlapped
operations can be a transient or a soft start using ramp time/slew
rates.
<b>
*OPC?
1
*PSC <b>
The Power-On Status Clear (PSC) command controls the automatic
power-on clearing of the Service Request Enable Register, the Standard
Event Status Enable Register, and device-specific event enable
registers.
ON(1) This choice enables the power-on clearing of the listed
registers.
OFF(0) This choice disables the clearing of the listed registers and
they retain their status when a power-on condition occurs.
< 0 | OFF | 1 | ON >
<b>
*PSC 1
*PSC?
<b>
*PSC?
1
AFX SERIES® OPERATION MANUAL
SECTION 8: REMOTE PROGRAMMING
Page 217 of 274