Hardware Components
The following table list the key features of SmartFusion I/Os.
Table 14 •
I/Os
Direct analog input
Total analog input
Total analog output
MSS I/O
FPGA I/O
Total I/O
Note: 16 MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for the MSS. These I/Os
support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, and 3.3 V) standards.
Note: 9 MSS I/Os are primarily for 10/100 Ethernet MAC and are also multiplexed and can be used as FPGA
I/Os if Ethernet MAC is not used in a design. These I/Os support Schmitt triggers and support only
LVTTL and LVCMOS (1.5 / 1.8 / 2.5, and 3.3 V standards.
The following figure shows the SmartFusion MSS Block Diagram
Figure 2 •
SmartFusion MSS Block Diagram
4.2
I/O Pin Connections
The A2F200M3F-FGG484 pin list is provided in the
A2F200 I/O
FG484
8
24
2
42
94
161
UG0209 User Guide Revision 7.1
Pin List,
page 28.
11
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