ZLE30267 Hardware Guide Document #153729 List of Figures ....................3 List of Tables ....................3 Supported Devices ..................5 Related Documents ..................5 Hardware Overview..................5 Hardware Feature Summary ...................... 5 Major Components ......................5 Hardware Features ......................5 Power Supply ........................7 USB Interface ........................
Datasheets for the ZL30267 and the other part numbers listed in the Supported Devices section Hardware Overview The ZLE30267 Evaluation Board is a test and demonstration platform with support for the full feature sets of the family of timing ICs.
ZLE30267 Hardware Guide SPI/I2C USB jack Power and ground jacks Connectors 5V adapter jack interface Device part # and Reset Info about on-board XOs button barcode LEDs VDD Control Input Clocks Control Output Clocks Local oscillator selection Figure 1 · Board Floor Plan...
USB Interface The Windows ® -based ZLE30267 GUI software communicates with the board via USB connector JDR1. Hardware Configuration Top Level Configurations The ZLE30267 Evaluation Board supports several operational modes of DUTs, including ...
ZLE30267 Hardware Guide Figure 2 · Configuration Topology with Annotations Each of the possible configurations is portrayed in the following series of Figures 3 through 9. The active serial bus and hardware control elements of the configuration are depicted by heavy lines. Active blocks are also identified with bold text.
ZLE30267 Hardware Guide In Configurations 2 and 3, the USB device is SPI master. The USB master can interface with an on-board EEPROM as in Configuration 2, or an “external SPI device” as in Configuration 3. The external SPI device could be either an EEPROM or a DUT mounted on another board.
ZLE30267 Hardware Guide In Configurations 4 and 5, The DUT is set up as a SPI master with external EEPROM. The difference between the two configurations is that in Configuration 4 the on-board EEPROM is referenced and in Configuration 5, a header-connected external EEPROM is referenced. Note that these configurations apply only to DUTs which do not have internal EEPROMs.
ZLE30267 Hardware Guide Configurations 6 and 7 depict scenarios in which an external serial bus master device is connected to the DUT. One Figure shows the topology for the two configurations because they are differentiated only by switch settings. Configuration 6 is SPI serial bus mode, whereas Configuration 7 is an I2C serial bus.
ZLE30267 Hardware Guide Switch and Jumper Configurations, Detailed Listing Each of the possible board configurations illustrated above is implemented as a collection of settings. The settings are comprised of jumper assignments, DIP switch settings, and/or software-controlled bit port logic (1=high, 0=low). This section provides a comprehensive listing of all the board settings for each configuration.
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ZLE30267 Hardware Guide Board Serial USB Controller IO Config. Serial Number Master Bus Slave Description Switch and Jumper Settings Pin Settings JP1 or GUI/PC controls external JP9 = on FT_FSW_OEB = 0 (SPI) EEPROM connected at header, JP6: all open...
ZLE30267 Hardware Guide Board Serial USB Controller IO Config. Serial Number Master Bus Slave Description Switch and Jumper Settings Pin Settings JP1 or External connected device as JP9 = open SPI master, local DUT as SPI JP6: open Header slave. External EEPROMs...
ZLE30267 Hardware Guide Table 2 · Power Connections and Settings Silkscreen Device/ Schematic Reference Function Basic Setting Sheet Description J1/BJ1 Power jack Unconnected Optional 5V Power interface J2/BJ2 (GND) Banana jack Unconnected Optional power interface GND J5 (5V) Power jack Connect to 5V 5V Power adapter (2.1 mm x 5.5 mm barrel jack)
ZLE30267 Hardware Guide DUT Type DUT Mode Settings (DIP controlled) Settings (GUI Controlled, on reset) Internal EEPROM I2C Slave I2C address: [SW1.IF1,SW1.IF0 ] = [0,0] or N/A, not supported by GUI [0,1] or [1,0] EEPROM configuration select= [SW1.AC2_GPIO2, SW1.AC1_GPIO1, SW1.AC0_GPIO0] Notes For all DUT modes, TEST_GPIO3 = 0 whether by DIP control or GUI control.
Connecting Off-Board Devices Two pin headers provide direct access to the ZLE30267 switched serial bus. JP1 and JP5 connect in to the serial bus signals on the board. JP1 is a 10-pin shrouded and keyed header which is compatible with the Aardvark brand USB to SPI/I2C adapter interface cable.
ZLE30267 Hardware Guide Table 10 · JP1 Serial Header Pin Assignments Signal Pin Number Pin Number Signal N.C. MISO N.C. SCLK MOSI Notes: SCL and SDA pins require changes to shunts on headers JP3 and JP4 to connect on board.
C17=dni value if required Notes Settings for OC1 can be used as a template for OC2, OC4, OC5, OC6, OC7, OC9, and OC10. Please refer to ZLE30267 schematic. Settings for OC3 can be used as a template for OC8. OC9 is factory-configured for HCSL with R191 not populated and R90=0 and R91=0.
Figure 11 · ZLE30267 Oscillator / Crystal Daughter Assembly Drawing Oscillator Daughter Card Assembly The ZLE30267 oscillator / crystal daughter is provided with components JP1, C2, and R2 pre-installed. An oscillator daughter card assembly is built by installing two additional components. The first component is the oscillator to be evaluated which is installed at site Y1 or Y3 based on its package size.
JP72 = ZLE30267 oscillator / crystal daughter card JP64 = Not installed An example of a ZLE30267 oscillator / crystal daughter card installed on header JP72 is shown in Figure When the daughter card is not installed, a jumper must be installed on JP72 pins 3-4.
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