Applications, Implementation, And Layout; Trf7963A Reader System Using Spi With Ss Mode - Texas Instruments TRF7963A Manual

TRF7963A
SLOS758G – DECEMBER 2011 – REVISED MARCH 2020

7 Applications, Implementation, and Layout

Information in the following Applications section is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI's customers are responsible for
determining suitability of components for their purposes. Customers should validate and test
their design implementation to confirm system functionality.
7.1

TRF7963A Reader System Using SPI With SS Mode

7.1.1 General Application Considerations
Figure 7-1 shows the TRF7963A application schematic using the serial port interface (SPI). Short SPI
lines, proper isolation to radio frequency lines, and a proper ground area are essential to avoid
interference. The recommended clock frequency on the DATA_CLK line is 2 MHz.
This schematic shows matching to a 50-Ω port, which allows connection to a properly matched 50-Ω
antenna circuit or RF measurement equipment (for example, a spectrum analyzer or power meter).
7.1.2 Schematic
Figure 7-1 shows a sample application schematic with a serial interface to the MCU.
Figure 7-1. Application Schematic, SPI With SS Mode MCU Interface
Minimum MCU requirements depend on application requirements and coding style. If only one ISO
protocol or a limited command set of a protocol must be supported, MCU flash and RAM requirements can
be significantly reduced. Recursive inventory and anticollision commands require more RAM than single
slotted operations. For example, an application for ISO/IEC 15693 only that supports anticollision needs
approximately 7KB of flash memory and 500 bytes of RAM. In contrast, a full NFC reader/writer
application with NDEF message support needs approximately 45KB of flash memory and 3KB of RAM. An
MCU that can run its GPIOs at 13.56 MHz is required for direct mode 0 operations.
58 Applications, Implementation, and Layout
NOTE
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