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MODE
EN2
EN
Mode 4
(full power)
x
1
5 VDC
Mode 4
(full power)
x
1
3.3 VDC
Mode 3
(half power)
x
1
5 VDC
Mode 3
(half power)
x
1
3.3 VDC
Mode 2
x
1
5 VDC
Mode 2
x
1
3.3 VDC
Mode 1
x
1
5 VDC
Mode 1
x
1
3.3 VDC
Standby mode
x
1
5 VDC
Standby mode
x
1
3.3 VDC
Sleep mode
1
0
Power down
0
0
(1) x = don't care
Copyright © 2011–2020, Texas Instruments Incorporated
Table 6-3. Power Modes
CHIP STATUS
REGULATOR
CONTROL
CONTROL
TRANS-
REGISTER
REGISTER
MITTER
(0X00)
(0X0B)
21
07
On
20
07
On
31
07
On
30
07
On
03
07
Off
02
00
Off
01
07
Off
00
00
Off
81
07
Off
80
00
Off
x
x
Off
x
x
Off
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SYS_CLK
SYS_CLK
RECEIVER
(13.56 MHz)
(60 kHz)
On
On
x
On
On
x
On
On
x
On
On
x
On
On
x
On
On
x
Off
On
x
Off
On
x
Off
On
x
Off
On
x
Off
Off
On
Off
Off
Off
TRF7963A
TRF7963A
SLOS758G – DECEMBER 2011 – REVISED MARCH 2020
TYPICAL
TYPICAL
VDD_X
CURRENT
POWER
PREVIOUS
(mA)
OUT (dBm)
On
130
23
20 to 25 µs
On
67
18
On
70
20
20 to 25 µs
On
53
15
On
10.5
—
20 to 25 µs
On
9
—
On
5
—
20 to 25 µs
On
3
On
3
—
On
2
—
On
0.120
—
Off
<0.001
—
Detailed Description
TIME
(FROM
STATE)
4.8 ms
1.5 ms
Start
15
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