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The relation between the 3-bit code and the external RF field strength (A/m) sensed by the antenna must
be determined by calculation or by experiments for each antenna design. The antenna Q-factor and
connection to the RF input influence the result. Direct command 0x19 is used to trigger an internal RSSI
measurement.
To check the internal or external RSSI value independent of any other operation:
1. Set transmitter to desired state (on or off) using Bit 5 of the Chip Status Control register (0x00) and
enable receiver using Bit 1.
2. Check internal or external RSSI using direct commands 0x18 or 0x19, respectively. This action places
the RSSI value in the RSSI register.
3. Delay at least 50 µs.
4. Read the RSSI register using direct command 0x0F. Values can range from 0x40 to 0x7F.
5. Repeat steps 1 to 4 as desired; the register is reset after read.
6.8
Oscillator Section
The 13.56-MHz oscillator is controlled by the Chip Status Control register (0x00) and the EN and EN2
signals. The oscillator generates the RF frequency for the RF output stage and the clock source for the
digital section. The buffered clock signal is available at pin 27 (SYS_CLK) for external circuits. B4 and B5
inside the Modulation and SYS_CLK register (0x09) can be used to divide the external SYS_CLK signal at
pin 27 by 1, 2, or 4.
Typical start-up time from complete power down is in the range of 3.5 ms.
During Power Down Mode 2 (EN = 0, EN2 = 1) the frequency of SYS_CLK is switched to 60 kHz (typical).
The 13.56-MHz crystal must be connected between pin 30 and pin 31. The external shunt capacitors
values for C
and C
1
used. The external shunt capacitors are calculated as two identical capacitors in series plus the stray
capacitance of the TRF7963A and parasitic PCB capacitance in parallel to the crystal.
The parasitic capacitance (C
(typical).
As an example, using a crystal with a required load capacitance (C
(see
Figure
6-4):
C
= C
= 2 × (C
1
2
Place a 27-pF capacitor on pins 30 and 31 to ensure proper crystal oscillator operation.
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must be calculated based on the specified load capacitance of the crystal being
2
, stray and parasitic PCB capacitance) can be estimated at 4 to 5 pF
S
– C
) = 2 × (18 pF – 4.5 pF) = 27 pF
L
S
Pin 30
C
1
Figure 6-4. Crystal Block Diagram
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SLOS758G – DECEMBER 2011 – REVISED MARCH 2020
) of 18 pF, the calculation is as follows
L
C
S
TRF796xA
Pin 31
Crystal
C
2
TRF7963A
TRF7963A
Detailed Description
21
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