Thermal Resistance Characteristics; Switching Characteristics - Texas Instruments TRF7963A Manual

TRF7963A
SLOS758G – DECEMBER 2011 – REVISED MARCH 2020
5.5

Thermal Resistance Characteristics

PACKAGE
RHB (32)
(1) This data was taken using the JEDEC standard high-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to increase substantially.
Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long-
term reliability.
5.6

Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER
DATA_CLK time, high or low (one half
t
LO/HI
of DATA_CLK at 50% duty cycle)
Slave select lead time, slave select
t
STE,LEAD
low to clock
Slave select lag time, last clock to
t
STE,LAG
slave select high
t MOSI input data setup time
SU,SI
t MOSI input data hold time
HD,SI
t MISO input data setup time
SU,SO
t MISO input data hold time
HD,SO
t MISO output data valid time
VALID,SO
(1) Recommended DATA_CLK speed is 2 MHz; higher data clock depends on the capacitive load. Maximum SPI clock speed should not
exceed 10 MHz. This clock speed is acceptable only when external capacitive load is less than 30 pF. MISO driver has a typical output
resistance of 400 Ω (12-ns time constant when 30-pF load is used).
10 Specifications
Rθ Rθ
JC
31°C/W 36.4°C/W
TEST CONDITIONS
Depends on capacitive load on the I/O lines
DATA_CLK edge to MISO valid, C
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Product Folder Links:
(1)
JA
T ≤ 25°C
A
2.7 W
(1)
= <30 pF
L
Copyright © 2011–2020, Texas Instruments Incorporated
TRF7963A
www.ti.com
(2)
POWER RATING
T ≤ 85°C
A
1.1 W
MIN TYP MAX
50 62.5 250
200
200
15
15
15
15
30 50 75
UNIT
ns
ns
ns
ns
ns
ns
ns
ns