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Operating Instructions
be generated by the RESET switch, a power up reset, a watchdog timeout, or
by a control bit in the LCSR. SYSRESET* remains asserted for at least 200 msec,
as required by the VMEbus specification.
3
Similarly, the VMEchip2 provides an input signal and a control bit to initiate
a local reset operation. By setting a control bit, software can maintain a board
in a reset state, disabling a faulty board from participating in normal system
operation.
The local reset driver is enabled even when the VMEchip2 is not the system
controller. A local reset may be generated by the RESET switch, a power up
reset, a watchdog timeout, a VMEbus SYSRESET*, or a control bit in the GCSR.
Front Panel Indicators (DS1-DS6)
The six LEDs on the MVME197 front panel are: FAIL, SCON, RUN, LAN,
VME, and SCSI.
1.
The yellow FAIL LED (DS1) is lit when the BRDFAIL signal line is active.
2.
The green SCON LED (DS2) is lit when the VMEchip2 is the VMEbus
system controller.
3.
The green RUN LED (DS3) is lit when the MC88110 bus MC* pin is low.
4.
The green LAN LED (DS4) lights when the LAN chip is the local
peripheral bus master.
5.
The green VME LED (DS5) lights when the board is using the VMEbus or
when the board is accessed by the VMEbus.
6.
The green SCSI LED (DS6) lights when the SCSI chip is the local peripheral
bus master.
Memory Maps
There are four points of view for the memory maps: 1) the mapping of all
resources as viewed by each processor bus (PAA/PDA+PAB/PDB bus), 2) the
mapping of onboard/off-board resources as viewed from the Local Peripheral
Bus (MC68040 compatible bus), 3) the mapping of all resources as viewed by
each of the MC88410 Cache Controllers (PA/PD bus), and 4) the mapping of
onboard resources as viewed by VMEbus Masters (VMEbus memory map).
Processor Bus Memory Map
Care should be taken, since memory maps 2, 3, and 4 are programmable. It is
recommended that direct mapping from the PA/PD Bus to the Local
Peripheral Bus be used.
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User's Manual
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