Motorola MVME297-002 User Manual page 29

Hardware Preparation and Installation
devices in the system must be handled by software. Refer to the memory maps
2
in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers
Programmer's Reference Guide.
The MVME197 contains shared onboard DRAM whose base address is
software-selectable. Both the onboard processor and off-board VMEbus
devices see this local DRAM at base physical address $00000000, as
programmed by the MVME197Bug firmware. This may be changed, by
software, to any other base address. Refer to the MVME197LE, MVME197DP,
and MVME197SP Single Board Computers Programmer's Reference Guide for
details.
If the MVME197 tries to access off-board resources in a non-existent location,
and is not the system controller, and if the system does not have a global bus
timeout, the MVME197 waits forever for the VMEbus cycle to complete. This
would cause the system to hang up. There is only one situation in which the
system might lack this global bus timeout: when the MVME197 is not the
system controller and there is no global bus timeout elsewhere in the system.
Multiple MVME197 modules may be configured into a single VME card cage.
In general, hardware multiprocessor features are supported.
Other MPUs on the VMEbus can interrupt, disable, communicate with and
determine the operational status of the RISC processor(s). One register of the
GCSR set includes four bits which function as location monitors to allow one
MVME197 processor to broadcast a signal to other MVME197 processors, if
any. All eight registers are accessible from any local processor as well as from
the VMEbus.
The MVME197 provides +12 Vdc power to the Ethernet LAN transceiver
interface through a 1 amp fuse (F2) located on the MVME197 module. If the
Ethernet transceiver fails to operate, check the fuse. When using the
MVME712M transition module, the yellow LED (DS1) on the MVME712M
front panel lights when LAN power is available, indicating that the fuse is
good.
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