Service Request Enable (Sre); Standard Event Status (Esr) - Stanford Research Systems SR124 Operation And Service Manual

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4.5.2 Service request enable (SRE)

4.5.3 Standard event status (ESR)

Weight Bit Flag
1 0 undef (0)
2 1 undef (0)
4 2 undef (0)
8 3 undef (0)
16 4 undef (0)
32 5 ESB
64 6 MSS
128 7 undef (0)
ESB : Event Status Bit. Indicates whether one or more of the enabled
events in the Standard Event Status Register is true.
MSS : Master Summary Status. Indicates whether one or more of the
enabled status messages in the Status Byte register is true.
This register is read with the *STB? query.
Each bit in the SRE corresponds one-to-one with a bit in the SB regis-
ter, and acts as a bitwise AND of the SB flags to generate MSS. Bit 6 of
the SRE is undefined—setting it has no e ect, and reading it always
returns 0. This register is set and queried with the *SRE(?) command.
At power-on, this register is cleared.
The Standard Event Status Register consists of 8 event flags. These
event flags are all "sticky bits" that are set by the corresponding
events, and cleared only by reading or with the *CLS command.
Reading a single bit (with the *ESR? i query) clears only Bit i.
Weight Bit Flag
1 0 OPC
2 1 undef (0)
4 2 QYE
8 3 DDE
16 4 EXE
32 5 CME
64 6 undef (0)
128 7 undef (0)
OPC : Operation Complete. Set by the *OPC command.
QYE : Query Error. Indicates data in the output queue has been lost.
DDE : Device-Dependent Error.
queue overflow.
Remote Operation
Indicates an internal command
SR124 Analog Lock-In Amplifier