Programming considerations
This chapter addresses the embedded modules programming considerations.
Note
This chapter applies only to development kit customers.
GPIO
General information
The NS7520 processor supports 16 general purpose I/O (GPIO) lines, some of which are reserved for
specific functions and some of which can be customized. These GPIO lines fall into three categories:
Those labeled "Reserved" in the following table are reserved for a specific use and must not be
n
reprogrammed, or the unit may not operate correctly. Often, these lines are not connected to
external interfaces.
Those labeled "Allocated" in the following table are exposed to an external interface and
n
allocated to a specific use by the software, but they can be customized safely with code
modifications.
Those labeled "Available" are exposed to an external interface, not controlled directly by the
n
software, and can be customized.
GPIO registers
Two registers, PORTA and PORTC, govern the 16 GPIO pins. Each is responsible for eight GPIO pins,
and each pin has four bits that completely describe its behavior. The four bits that describe the GPIO
behavior are its mode (CMODE), direction (CDIR), special function (CSF--only applicable to PORTC), and
data value. The first three bits describe the functionality of the GPIO pin. The "data" bit provides the
current value of the pin when read and allows control of the value of an output pin when written. Use
the following table for information on configuring a bit position in the appropriate register for GPIO
input or output.
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