Quectel SC20 Series Hardware Design page 6

1.6 2019-01-10
2.0 2020-01-19
2.1 2020-11-13
3.0.0 2021-07-30
SC20_Series_Hardware_Design
Pat ZHANG
Arsene TONG
Arsene TONG/
Ted ZHOU
Ming CHEN/
Downey YANG/
Kevin ZHOU
3. Added the description that the GPIO_68 and
GPIO_88 cannot be pulled up during start-up
in Table 9 and Chapter 3.14.
4. Updated the turning on timing of the module
(Figure 8).
5. Added the description for SPI interface in
Chapter 3.14.
6. Added the description that the effective
resolution of ADC interfaces is 12 bits in
Chapter 3.16.
7. Added the current consumption of SC20-EU
in Table 55.
8. Updated the RF receiving sensitivity of
SC20-A, SC20-AU and SC20-J in Table 59,
60 and 61.
9. Added the RF receiving sensitivity of
SC20-EU in Table 62.
10. Updated the reflow soldering thermal profile
and the related parameters in Chapter 9.2.
Updated the GNSS sensitivity in Table 33.
1. Added the information of Linux-version
modules SC20-CEL R1.1, SC20-EL,
SC20-AL, SC20-AUL and SC20-JL.
2. Deleted SC20-EU and its related information.
1. Added SC20-EU and its related information.
2. Updated the operating temperature range in
Chapter 2.2/7.4.
3. Updated general description of storage,
manufacturing and soldering in Chapter
9.1/9.2.
Preliminary:
1. Added SC20-AX/EX and the related
information.
2. Added the notes of coating and cleaning in
Chapter 9.2.
Smart Module Series
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