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PSoC™ 4 MCU low-power modes and power reduction techniques
Low-power mode details
PSoC™ Creator:
CySysPmDeepSleep()
to enter this mode before the system is ready, then the device will go into sleep mode instead and
automatically enter the originally intended mode when the hold-off expires. No return value.
Exit from deep sleep mode occurs when an interrupt is triggered. Upon exiting deep sleep, PSoC™ 4 re-enters
Active mode. The configuration of deep sleep wakeup sources requires only that their interrupts be enabled.
3.2.3
Peripheral deep sleep configuration
When a device goes into deep sleep some peripherals need to be configured so that they can continue to
operate in deep sleep or wake the device from deep sleep.
ModusToolbox™ software: To ensure that a peripheral is configured correctly for deep sleep, ModusToolbox™
has specific API functions _DeepSleepCallback() and _DeepSleep(). These configure the peripheral
for operation in deep sleep and waking up from deep sleep. See the
information.
PSoC™ Creator: Components can be configured to operate in deep sleep to save power, save their current
state, or both. In these cases, use the component's specific API function _Sleep() to store the current
component state before calling CySysPmDeepSleep(); and _WakeUp() after waking up from Deep
Sleep. Depending on your application, it may be faster to simply call the component's _Stop() function
before entering deep sleep mode and _Start() after waking.
3.2.4
Deep sleep mode use cases
The deep sleep mode should be used when the PSoC™ 4 high-performance analog and digital peripherals are
not needed, but the device still needs to be able to wake up periodically using the WDT, or upon other events
such as an I
C address match.
2
Regular wakeup intervals enable periodic use of active mode peripherals, such as the ADC, to take readings or
scan CAPSENSE™ button inputs.
3.3
Hibernate mode with PSoC™ Creator
In hibernate mode, all clocks and synchronous peripherals in PSoC™ 4 MCU are disabled. The pins and low-
power comparators may remain active, and the SRAM and UDB register states are retained. Currently
ModusToolbox™ software does not support any PSoC™ 4 MCU device that supports hibernate mode.
Note:
The PSoC™ 4000, 4000S, 4100S, 4100S plus, 4100S plus 256k, 4100S max, 4200DS, 4500S, 4700S,
4100PS and analog coprocessor product lines do not support hibernate mode.
3.3.1
Hibernate mode wakeup sources
Pin and low-power comparator interrupts can wake the device from hibernate mode. Any wakeup from
hibernate mode causes a device reset, but SRAM and some register states are retained, allowing the wakeup
reset reason to be detected.
Although SRAM is retained, after reset, the C startup code initializes all global and static variables to either an
initial value or zero. To prevent a variable from getting reinitialized after waking from hibernate, use the
CY_NOINIT attribute in the definition of the variable.
To make sure a variable does get initialized, your code should determine if the reset was not caused by a
wakeup from hibernate mode. After the return to active mode from a reset, call the
Application Note
– Sets the system into deep sleep power mode. If firmware attempts
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peripheral driver library(PDL)
for more
001-86233 Rev. *I
2021-11-04
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