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PSoC™ 4 MCU low-power modes and power reduction techniques
Other low-power mode considerations
Note:
The hibernate regulator is not available in PSoC™ 4000, 4000S, 4100S, 4100S plus, 4100S Plus 256k,
4100S max, 4200DS, 4500S, 4700S, 4100PS, and analog coprocessor product lines. These devices
do not support hibernate mode.
6.7
Debug interface
PSoC™ 4 MCU supports on-chip debugging. You may observe a higher current consumption than expected
while in debug mode. This is normal because the programming and debug interface remains active in all low-
power modes.
Power measurements may also be skewed if the debug pins are set to SWD mode and a MiniProg3
programmer/ debugger is attached, even if the PSoC™ 4 MCU device is not in debug mode.
6.7.1
PSoC™ Creator
Debug interface pins are set to GPIO mode on all chips from the factory, but a new PSoC™ Creator project sets
them to SWD mode by default. The registers that control the debug interface can be changed only at
programming time. Use the System tab in the .cydwr file of the PSoC™ Creator project to set the pins to GPIO
mode, as
Figure 9
shows.
Figure 9
Disable debug interface to reduce power
6.7.2
ModusToolbox™ software
Debug interface pins are set to GPIO mode on all chips from the factory, but a new ModusToolbox™ project sets
them to SWD mode by default.
Do the following to change the debug interface pins to GPIO mode:
Go to Quick panel > Tools > Device configurator.
1.
In the device configurator, go to Pins and look for the pins labeled "CYBSP_SWDIO" and "CYBSP_SWDCK",
2.
as
Figure 10
shows.
Deselect these pins to set the device in GPIO mode.
3.
Application Note
20 of 38
001-86233 Rev. *I
2021-11-04
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