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PSoC™ 4 MCU low-power modes and power reduction techniques
Other low-power mode considerations
6.2
WDT
The WDT can operate in active, sleep, and deep sleep modes. The counters in the WDT can generate interrupts
or resets, depending on the configuration and operating conditions. This allows the WDT to replace a
traditional sleep timer in addition to guaranteeing reliable operation.
Increasing the WDT interval or disabling it entirely before entering low-power modes can reduce the time spent
in active mode and the overall power consumption. The WDT is not active in hibernate or stop modes.
More information on the operation of the WDT and the associated API is available in the
peripheral driver library
6.3
GPIOs
GPIOs can continue to drive the external circuitry when the PSoC™ device is in a low-power mode. This is
helpful when you need to hold external logic at a fixed level, but it can lead to wasted power if the pins
needlessly source or sink current. The specific power savings of this technique depend on the circuit attached
to the specific GPIO pin.
You should analyze your design and determine the best state for your GPIOs during low-power operation. If
holding a digital output pin at logic 1 or 0 is best, then use the GPIO or Pin _Write() function to set it.
ModusToolbox™ software:
/* Set MyPin to '0' for low power. */
Cy_GPIO_Write(MYPIN_0_PORT, MYPIN_0_NUM, 0u);
Configure all unused GPIOs to analog High-Z unless there is a specific reason to use a different drive mode. A
port-wide drive mode may be set using the _SetDriveMode() function.
/* Set MyPin to Alg HI-Z for low power. */
Cy_GPIO_SetDriveMode(MYPIN_0_PORT, MYPIN_0_NUM, CY_GPIO_DM_HIGHZ);
PSoC™ Creator:
/* Set MyPin to '0' for low power. */
MyPin_Write(0);
Configure all unused GPIOs to analog High-Z unless there is a specific reason to use a different drive mode. A
port-wide drive mode may be set using the _SetDriveMode() function.
/* Set MyPin to Alg HI-Z for low power. */
MyPin_SetDriveMode(MyPin_DM_ALG_HIZ);
PSoC™ 4 MCU's flexibility makes it easy to manage GPIO drive modes to prevent unwanted current leakage. See
AN86439 – PSoC™ 4 – Using GPIO pins
6.4
TCPWM
When using a counter, timer or PWM, you should configure the clock sourcing the channel as to have as low a
frequency as possible while still meeting your frequency and accuracy requirements. For example, if you need
to generate a 1-second interrupt with a timer, it is better to use a clock frequency of 1 kHz with the period
equaling 1,000 counts than a clock frequency of 1 MHz with a period equal to 1,000,000 counts. The power
Application Note
(PDL), and the
PSoC™ Creator system reference
for more information on the GPIO pin configurations.
18 of 38
PSoC™
TRM,
guide.
001-86233 Rev. *I
2021-11-04
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