Triggering - National Instruments NI 447 Series User Manual

Triggering

© National Instruments Corporation
In addition to supporting internal software triggering and external digital
triggering to initiate an acquisition sequence, the NI 447X also supports
analog-level triggering. You can configure the trigger circuit to monitor
any one of the AI channels to generate the level trigger. Choosing an input
channel as the level trigger channel does not influence the input channel
capabilities. The level trigger circuit compares the full 24 bits of the
programmed trigger level with the digitized 24-bit sample.
The trigger circuit generates an internal digital trigger based on the input
signal and the user-defined trigger levels. For example, you can configure
the AI section to start acquiring samples after the AI signal crosses a
specific threshold. You also can route this internal trigger to the RTSI bus
to synchronize the start of the acquisition operation by the NI 447X with the
operation of other devices in your system.
The nature of delta-sigma converters means that the triggering circuits
operate on the digital output of the converter. Since the trigger is generated
at the output of the converter, triggers can occur only when a sample is
actually generated. Placing the triggering circuits on the digital side of the
converter does not affect most measurements unless an analog output is
generated based on the input trigger. In this case, make sure you account for
the inherent delays of the finite impulse response (FIR) filters internal to the
delta-sigma converters. The delay through the input converter is
38.8 sample periods.
During repetitive sampling of a waveform, you might observe jitter because
of the uncertainty of where a trigger level falls compared to the actual
digitized data. Although this trigger jitter is never greater than one sample
period, it can seem quite significant when the sample rate is only twice the
bandwidth of interest. This jitter usually has no effect on the processing of
the data, and you can decrease this jitter by sampling at a higher rate.
Five analog level triggering modes are available, as shown in Figures 3-8
through 3-12. You can set lowValue and highValue independently in the
software.
Chapter 3 Device Overview and Theory of Operation
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