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AIROC™ CYW20835 Bluetooth® LE system on chip hardware design
guidelines
Component placement
2.8
Serial flash
The CYW20835 kit uses the GD25WD80C serial flash from GigaDevice. Place the flash device on the same side as
pins 35–40 of the CYW20835 device so that serial flash signals are relatively short; this helps to minimize
unnecessary crossing with other signals.
2.9
Layer 2, solid ground fill
Fill the layer immediately below the layer where CYW20835 is located (Layer 2), with solid ground for optimal
ground return path. An analog ground (GND_A) cutout for the analog MIC is necessary. The GND_A cutout
should cover all of the analog MIC signal and power traces on Layer 1.
Figure 4
Layer 2, solid ground fill
2.10
Power traces
Use wide traces for power supply lines. You should calculate the maximum current to be carried on each trace
•
and make the trace width proportionate to the current
Route the main DC power supply line up the middle of the board like a spine, branching off left and right as
•
needed
2.11
Avoid routing DC power in a loop
Protect the RF power supply from main power, noisy signals, and digital power by separating with ground fill
•
Ensure that adequate power trace width and vias are available (or present) to minimize parasitic impedance
•
CBUCK_OUT → Minimum 12 mils trace width
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CBUCK_OUT to DIGLDO_VDDIN (pin 25) → Minimum 8 mils trace width
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VDDIO → Minimum 12 mils trace width
−
User Guide
6 of 11
002-34024 Rev. **
2021-10-05
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