Overview - Commodore AMIGA Technical Manual

AMIGA 1000 COMPONENT LEVEL REPAIR
OVERVIEW
The AMIGA computer is a high-performance system with advanced graphics and audio features. The
Functional Block Diagram on page 4 illustrates the relationship of the various circuits on the Main
Logic board and Piggyback. The principle hardware features consist of the 6 8 0 0 0 microprocessor
which runs at 7 .2 MHz, 256K bytes of RAM (user expandable to 5 1 2K, configurable to 8M ), 2 parallel
I/O chips and 3 custom VLSI chips that provide the unique capabilities for animation, graphics and sound.
6 8 0 0 0 MICROPROCESSOR
The 6 8 0 0 0 is the CPU of the system. All other resources are under software control via control data
issued from it. All 3 custom chips have control registers that are written by the 6 8 0 0 0 .
The 6 8 0 0 0 communicates with the rest of the computer via its address bus, data bus and control
lines. Notice that in the block diagram the 3 custom chips do not reside directly on the 6 8 0 0 0 buses.
When the 6 8 0 0 0 starts a bus cycle that is intended for the custom chips or the display RAM, the
bus control logic detects whether or not the display RAM buses are available. The bus control logic
will not assert the acknowledge signal (/DTACK) back to the 6 8 0 0 0 until the display RAM buses are
available. Once the 6 8 0 0 0 receives /DTACK it completes the bus cycle. Connecting the display RAM
buses to the 6 8 0 0 0 buses is discussed further in the section on bus control and multiplexers. Because
the display RAM is capable of approximately twice the bandwidth of the 6 8 0 0 0 , the 6 8 0 0 0 is usually
not delayed by waiting for the display buses to become available.
The 6 8 0 0 0 can fetch instructions from:
Boot ROM
Processor RAM
Display RAM
The 6 8 0 0 0 can read and write data directly to:
Boot ROM (Read Only)
Processor RAM (After boot this is Read Only)
Display RAM
Parallel I/O Chips
3 Custom I.C.s
The 6 8 0 0 0 transmits data and control to and from the peripherals via the parallel I/O and the 3 custom
chips.
7M is the processor clock to the 6 8 0 0 0 . C1-C4 and /DAC are used to clock the custom chips and
for determining the timing of signals to the memory arrays.
BOOT ROM
The boot ROM is comprised of 2 standard 32K byte ROMS configured in parallel to form a 32K word
that includes the routines for bringing in additional code from the floppy disk.
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