System Memory Controller And Pci Host Bridge; Memory; Flash Memory - Motorola MVME5100 Manual

4 Functional Description

System Memory Controller and PCI Host Bridge

The on-board Hawk ASIC provides the bridge function between the processor's bus and the
PCI bus. It provides 32-bit addressing and 64-bit data; however, 64-bit addressing (dual
address cycle) is not supported. The ASIC also supports various processor external bus
frequencies up to
100 MHz.
There are four programmable map decoders for each direction to provide flexible address
mappings between the processor and the PCI bus. The ASIC also provides an Multi-Processor
Interrupt Controller (MPIC) to handle various interrupt sources. They are: four MPIC timer
interrupts, interrupts from all PCI devices and two software interrupts.

Memory

The following subsections describe various memory capabilities on the MVME5100 including
Flash memory and ECC SDRAM memory.

Flash Memory

The MVME5100 contains two banks of Flash memory. Bank B consists of two 32-pin devices
which can be populated with 1MB of Flash memory (only 8-bit writes are supported for this
bank). Refer to the application note following for more write-protect information on this product.
Bank A has 4 16-bit Smart Voltage FLASH SMT devices. With 32Mbit flash devices, the flash
memory size is 16MB. Note that only 32-bit writes are supported for this bank of flash memory.
The Write Protect function provides a hardware method of protecting certain boot sectors. If the
system asserts V IL (low signal) on the WP#/ACC pin, the device disables the program and
erase capability, independently of whether those sectors were protected or unprotected using
the method described in the Sector/Sector Block Protection and Unprotection of the AMD
datasheet. The two outermost 8Kbyte boot sectors are the two sectors containing the lowest
addresses in a bottom-boot-configured device, or the two sectors containing the highest
addresses in a top-boot-configured device.
The aforementioned Motorola implemented device (at the time of this printing is the only
Motorola qualified Flash device used on this product) is a top-boot device, and as such, the
write protected area is in the upper 16KB of each device. And, since Motorola is using 4 devices
for the soldered Flash bank, the write protected region corresponds to the upper 64KB of the
soldered Flash memory map. Thus the address range of $F4FF 0000 to F4FF FFFF is the write
protected region when the J16 header is jumpered across pins 2 and 3.
If PPCBug tries to write to those write-protected address areas when
pins 2-3 on J16 are set, the command will simply not finish (i.e., erase sector function stops at
$F4FF 0000).
40
MVME5100 Installation and Use (V5100A/IH5)
Application Note: For Am29DL322C or Am29DL323C, 32Megabit (4M x 8-Bit/2M x
16-bit) CMOS 3.0 Volt-only Flash Memory.