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AT8901M
Table 3-14: Power Connector (P10)
Signal
Pin
N.C.
1
N.C.
3
HA0
5
HA2
7
HA4
9
HA6
11
SCL_A
13
SCL_B
15
MT1_TIP(N.C.)
17
RING_A(N.C.)
19
MT1_RING(N.
21
C.)
RRTN_A(N.C.)
23
SHELF_GND
25
ENABLE_B
27
VRTN_B
29
EARLY_B
31
-48V_A
33
3.7.2
Power Distribution
The 48 Volts are supplied by the backplane via two independent rails, primary (A) and second-
ary (B). The rails are mixed using power Schottky rectifiers. A 7A fuse protects each -48V line
and a 10A fuse protects each RTN line. A hot swap controller enables the 48V power to the
board.
A quarter brick DC/DC converter transforms the 48 Volts to secondary 12 Volts, which are dis-
tributed on the board. The converter allows a maximum of 14A output current.
Two different management voltages (3.3V and 5V) and five payload voltages (3.3V, 2.5V, 1.8V,
1.25V and 1.2V) are generated by point of load converters. These are either switches or linear
regulators.
The management (or suspend) power is present once the board is connected to the backplane.
It supplies the IPMI part which in turn controls the payload power. The various payload voltages
are sequenced. The initial power up sequence is as follows (20ms delay between steps):
1. 3.3V, 1.8V and fabric mezzanine
2. 2.5V, 1.25V and 1.2V
The Power Down Sequence is performed in reversed order with a 1ms delay.
4
1
16
13
20
17
21
24
25
26
29
28
32
27
31
30
34
33
Page 3 - 15
Hardware Description
Pin
Signal
2
N.C.
4
N.C.
6
HA1
8
HA3
10
HA4
12
HA5
14
SDA_A
16
SDA_B
18
MT2_TIP(N.C.)
20
RING_B(N.C.)
22
MT2_RING(N.
C.)
24
RRTN_B(N.C.)
26
LOGIC_GND
28
VRTN_A
30
EARLY_A
32
ENABLE_A
34
-48V_B
AT8901M User Guide
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