Quectel EM05-G Hardware Design page 20

7 USB_DP
8 W_DISABLE1#
9 USB_DM
10 WWAN_LED#
11 GND
12 Notch
13 Notch
14 Notch
15 Notch
16 Notch
17 Notch
18 Notch
19 Notch
20 PCM_CLK*
21 CONFIG_0
22 PCM_DIN*
23 WOWWAN#
PCM_DOUT*/
24
1)
VDD_IO
25 DPR*
26 W_DISABLE2#*
27 GND
28 PCM_SYNC*
29 NC
30 USIM1_RST
EM05-G_Hardware_Design
AIO USB 2.0 differential data (+)
Airplane mode control.
DI, OD
Active LOW.
AIO USB 2.0 differential data (-)
RF status indication LED.
DO, OD
Active LOW.
Ground
Notch
Notch
Notch
Notch
Notch
Notch
Notch
Notch
DIO, PD PCM clock
Connected to GND
DO
internally.
DI, PD PCM data input
Wake up the host.
DO, OD
Active LOW.
DO, PCM data output/Antenna
PD/PO tuner supply power.
Dynamic power reduction.
DI, PU
High level by default.
GNSS disable control.
DI, OD
Active LOW.
Ground
DIO, PD PCM data frame sync
NC
DO, PD (U)SIM1 card reset
LTE Standard Module Series
EM05-G Hardware Design
1.8/3.3 V
VCC
1.8 V
1.8 V
1.8/3.3 V
1.8 V
1.8 V
1.8/3.3 V
1.8 V
USIM1_VDD
1.8/3.0 V
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