Electrical Characteristics Table; General Specifications - Allegro MicroSystems A8600 Manual

Quadruple output regulator with two high-side switches, bu/acc voltage detectors, and mute delay
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A8600
ELECTRICAL CHARACTERISTICS
unless otherwise specified
Characteristic

GENERAL SPECIFICATIONS

Input Supply Current
Input Supply Current
1
Input Supply Current, PFM
1,3
(Using components shown in Typical
Application Circuit diagram and
table 3.)
Internal Oscillator Frequency
LX1/2/3/4 Switching Frequency
EN/SYNC Synchronization Timing
Synchronization Input Frequency
Synchronization Input Duty Cycle
EN/SYNC Input
EN/SYNC Pin High Threshold
EN/SYNC Pin Low Threshold
EN/SYNC Hysteresis
EN/SYNC Input Resistance
EN/SYNC Turn-Off Delay
VREG Output and BIAS Input
VREG Output Voltage
VREG (REGOK rising)
VREG (BIAS switch Off and POR)
BIAS Switch Turn-On Threshold
Bias Switch Voltage Drop
BIAS Input Voltage Range
Power OK (POK)
POK Low Condition Output Voltage
POK Leakage
1
Continued on the next page...
Quadruple Output Regulator with Two High-Side Switches,
BU/ACC Voltage Detectors, and Mute Delay
Valid at 5.5 V ≤ V
≤ 26 V, –40°C ≤ T
INx
Symbol
Test Conditions
I
V
> 3.2 V, I
IN1
BIAS
SW1
V
= 12 V, V
IN1
SW1
I
LO_IQ0
BUO and ACCO open, I
V
= 12 V, V
IN1
SW1
I
LO_IQ1
BUO and ACCO open, I
V
= 12 V, V
IN1
SW1
I
LO_IQ2
BUO and ACCO open, I
f
OSC
f
SYNC
D
SYNC
3.0 V < V
< 3.6 V, V
BIAS
V
ENIH
4.5 V < V
< 5.5 V, V
BIAS
3.0 V < V
< 3.6 V, V
BIAS
V
ENIL
4.5 V < V
< 5.5 V, V
BIAS
3.0 V < V
< 3.6 V, V
BIAS
V
ENHYS
4.5 V < V
< 5.5 V, V
BIAS
R
ENIN
Measured from EN/SYNC pulled low to
t
dOFF
SW2/3/4, S1/2, and TSD turned off
Measured from EN/SYNC pulled low or TSDH
t
dLo_IQ
going high to SW1 entering Low IQ mode
V
V
= 0 V
VREG
BIAS
V
V
rising
REGPORHI
VREG
V
V
falling
REGPORLO
VREG
V
V
− V
BIAS(TH)
BIAS
VREG
V
V
− V
BIASSW
BIAS
VREG
V
BIAS
V
I
= 3 mA
POKO(L)
POK
I
V
= 5.0 V
POK(LKG)
POKO
≤ 125ºC, –40°C ≤ T
A
= 0 mA
= 3.3 V, V
≤ 0.4 V,
EN/SYNC
= 40 µA, T
= 25ºC
SW1
A
= 5.0 V, V
≤ 0.4 V,
EN/SYNC
= 200 µA, T
= 25ºC
SW1
A
= 6.5 V, V
≤ 0.4 V,
EN/SYNC
= 1 mA, T
= 25ºC
SW1
A
rising
EN/SYNC
rising
EN/SYNC
falling
EN/SYNC
falling
EN/SYNC
– V
ENIH
ENIL
– V
ENIH
ENIL
≤ 125ºC;
J
Min.
Typ.
Max.
7.5
10
50
250
750
360
425
490
325
525
45
50
55
2.0
2.6
0.8
1.2
200
400
120
200
280
15
2048
2.95
3.05
3.175
2.86
2.93
2.98
2.85
2.90
2.96
−3
10
20
45
70
3.2
5.5
300
−1
1
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Unit
mA
µA
µA
µA
kHz
kHz
%
V
V
V
V
mV
mV
kΩ
PWM
cycles
PWM
cycles
V
V
V
mV
mV
V
mV
µA
9

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