Boot Regulators; Sw1 Low Ip Pwm Mode; Sw1 Pulse Frequency Modulation (Pfm) And Low Iq Mode - Allegro MicroSystems A8600 Manual

A8600

BOOT Regulators

Each of the four switchers has a regulator to charge its boot
capacitor. The boot regulators detect undervoltage and overvolt-
age of the boot capacitor. Also, the boot regulators have a current
limit circuit to protect the boot regulator during a short circuit
condition. SW1, SW2, and SW3 derive their boot voltage from
VIN1, VIN2, and VIN3, respectively. However, SW4 does not
have a VIN pin because it drives external MOSFETs. There-
fore, SW4 derives its boot voltage from the VIN3 pin. This sets
a requirement that V should be approximately equal to the
IN3
supply voltage at the drain of the external, high-side MOSFET
(which could be considered to be V
SW1/2/3/4 Pulse Width Modulation (PWM)
Mode
The A8600s four buck switchers utilize fixed-frequency, peak
current mode control to provide excellent load and line regula-
tion, fast transient response, and ease of compensation.
A high-speed comparator and control logic, capable of pulse
widths less than 180 ns, is included for each of the four buck
switchers. The inverting input of the comparator is connected
to the output of the error amplifier. The non-inverting input
is connected to the sum of the current sense signal, the slope
compensation, and a DC offset voltage (V
nally 400 mV).
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-40 -20 0 20
Figure 10. Typical MOSFET R
Quadruple Output Regulator with Two High-Side Switches,
).
IN4
, nomi-
PWMOFFSETx
40 60 80 100 120 140
Temperature (°C)
versus temperature
DS(on)
BU/ACC Voltage Detectors, and Mute Delay
At the beginning of each PWM cycle, the CLK signal sets the
PWM flip-flop and the upper MOSFET is turned on. When the
summation of the DC offset, slope compensation, and current
sense signal, rises above the error amplifier voltage the PWM
flip-flop is reset and the upper MOSFET is turned off. The PWM
flip-flop is reset dominant so the error amplifier may override the
CLK signal in certain situations. For example, at very light loads
or extremely high input voltage the error amplifier temporarily
reduces its output voltage below the 400 mV DC offset and the
PWM flip-flop ignores one or more of the incoming CLK pulses.
The upper MOSFET does not turn on and the regulator skips
pulses to maintain output voltage regulation.
In PWM mode all of the A8600 fault detection circuits are active.
See the Timing Diagrams section for diagrams showing how
faults are handled when in PWM mode. Also, the Protection
Features section of this datasheet provides a detailed description
of each fault and table 1 presents a summary.

SW1 Low IP PWM Mode

SW1 supports two different levels of PWM current limit: 100%
current limit mode, which is normal PWM operation, and Low IP
PWM mode, in which the current is limited to about 50% of the
typical current limit. Low IP PWM mode is invoked when SW1
is commanded to be in Low IQ PFM mode (see next section) but
is either soft starting (V
The purpose of Low IP PWM mode is to give priority to main-
taining reliable regulation of V
tection circuits inside the A8600 (high precision comparators,
timers, and counters) that are normally off during Low IQ PFM
mode. There are several faults that cause a transition from
Low IQ PFM mode to Low IP PWM mode: a missing asynchro-
nous diode, an open or shorted boot capacitor, V
ground, or LX1 shorted to ground. See the Timing Diagrams sec-
tion for operation of SW1 in normal PWM mode, and operation
of SW1 when it transitions from Low IQ PFM mode to Low IP
PWM mode.
SW1 Pulse Frequency Modulation (PFM) and
Low IQ Mode
160
SW1 is an always-on buck regulator, with both PWM and PFM
modes of operation (PWM mode is described in the previous sec-
tion). SW1 operates in Low IQ PFM mode if both the EN/SYNC
and ACCI pins are held low continuously for 2048 clock cycles.
< 700 mV) or a fault has occurred.
FB1
while enabling all the pro-
SW1
SW1
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
shorted to
27